remains
the
same
but
this
time
Z2D
is
active.
Because, instead
of
WR* going low, RD* goes
low and READ
is
generated. READ
is
inverted
by Z5 and activates tri-state
buffer
Z4. Data
present
on
the
input
is
transferred
to
the
output.
If
the
relay
is
"on",
Z4 will
output
to
D1
a low;
and if K1
is
not
on,
a high will be
outputed
to
D1.
The
program will
take
appropriate
action
depending on a
status
of
D1
as line
900
shows.
Notice
that
the
hardware:
1. Decoded
the
addresses and
outputed
one
signal only when
the
device was called
upon
to
work
2. Had
to
perform a WRITE
function
as well as a
READ
function
3. Had
to
latch
data
from
the
data
lines (may
not
always be necessary)
4. Contains a separate
power
supply
5. Does
not
contain
more
than
1
LS
TTL
load
on
anyone
output
from
the
Computer
4 and 5 are very
important
if
you
want
to
guarantee
proper
operation
of
your
Computer.
Port
Based
External Device
Figure
21
shows a logic diagram
of
a port-based
coffee
pot
control system. Notice from Z2
to
the
right.
the
circuit
is
the
same as Figure 20.
Only
the
reference designators have changed.
The
major difference
is
how
a
port
IS decoded
versus
memory
decoding. A
port
is
restricted
to
only
256 lines. Therefore only
one
NAND gate
and
part
of
an inverter are necessary
to
decode
port
FE (Decimal 2541.
In
the
program listing, Lines
600,
800
will have
to
be changed. Line
600
should
now
read
OUT
254,2
88
And Line
800
would read
B=2:
A=I
NP
254
When Line
600
is
executed,
Binary 1111
1110
will be
outputed
on A7
thru
A0.
The
outputs
of
Z1
generates FE*. FE*
is
applied
to
Z2A
and
B.
OUT* will go low and
D1
will go high.
The
high
at
the
D
input
of
25 will be latched in, and
the
relay will
turn
on.
At
the
new line
800,
FE* will be generated
and
IN* will go low. Z2B generates READ, and
the
status
of
the
contacts
of
K1 will be
sent
to
the
Computer.
As
you
can see,
the
major differences between a
memory-mapped
system and a
port
system
is
the
decoding techniques. Even
though
different
signals are used,
they
operate
in
about
the
same
manner.
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