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Xilinx SP701 User Manual
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Figur
e 24:
XADC (SYSMON) Interface
X22606-040219
-
See the SP701
schemac
0381874 for de
tailed SY
SMON header J24 and XADC_VREF
opon
details.
Chapter 3:
Board Component Descriptions
UG1319 (v1.0) July 12, 2019
www.xilinx.com
SP701 Board User Guide
43
S
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d
F
e
e
d
b
a
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k
42
44
Table of Contents
Revision History
2
Table of Contents
3
Chapter 1: Introduction
4
Overview
4
Additional Resources
5
Block Diagram
5
Board Features
6
Board Specifications
7
Chapter 2: Board Setup and Configuration
9
Electrostatic Discharge Caution
9
Board Components
9
Default Switch and Jumper Settings
12
Spartan-7 Device Configuration
13
Chapter 3: Board Component Descriptions
15
Overview
15
Component Descriptions
15
Clock Generation
21
Appendix A: VITA 57.1 FMC Connector Pinouts
44
Appendix B: Xilinx Design Constraints
45
Overview
45
Appendix C: Regulatory and Compliance Information
46
CE Information
46
Compliance Markings
47
Appendix D: Additional Resources and Legal Notices
48
Xilinx Resources
48
Documentation Navigator and Design Hubs
48
References
49
Please Read: Important Legal Notices
50
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Xilinx SP701 Specifications
General
Brand
Xilinx
Model
SP701
Category
Motherboard
Language
English
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