Renesas RL78/G13 Application Note

RL78/G13 Handshake-based SPI Master Transmission/Reception
R01AN6883EJ0100 Rev.1.00 Page 25 of 38
June.15.23
5.6.6 CSI00 Configuration
Figure 5-6 shows the flow of CSI00 Configuration.
Figure 5-6 CSI00 Configuration
R_CSI00_Create()
CSI00 operation stopped
ST0 resistor ← 0001H
return
CSIMK00 bit ← 1
Disable CSI00 interrupt
Clear CSI00 interrupt request flag
CSIIF00 bit ← 0
Set CSI00 interrupt priority to level 3
CSIPR100 bit ← 1
CSIPR000 bit ← 1
Clear CSI00 error flag
SIR00 resistor ← 0003H
CSI00 setting
-Operating clock: set CK0
-Sof tware Trigger
-Interrupt factor: Transfer completion interrupt
-CSI communication mode: send/ receive mode
-CSI operation mode: Type 1
-MSB first transfer
-Set data length to 8 bits
-Baud rate: 1000000bps
SMR00 resistor ← 0020H
SCR00 resistor ← C007H
SDR00 resistor ← 1E00H
CSI pin se tting
Initial value of SCK00 pin : High level
Initial value of SO00 pin: Low level
Output permission for CSI00 pin
P10 is set to output mode
P11 is set to input mode
P12 is set to output mode
SO0 resistor ← 0F0EH
SOE0 resistor ← 0001H
PM1 resistor
← FAH
P1 resistor ← 05H

Renesas RL78/G13 Specifications

General

Brand	Renesas
Model	RL78/G13
Category	Computer Hardware
Language	English