Renesas RL78/G13 Application Note

RL78/G13 Handshake-based SPI Master Transmission/Reception
R01AN6883EJ0100 Rev.1.00 Page 30 of 38
June.15.23
5.6.12 CSI00 Transmit/Receive Processing
Figure 5-13 shows the flow of CSI00 Transmit/Receive Processing.
Figure 5-13 CSI00 Transmit/Receive Processing
R_CSI00_Send_Receive
()
return
status
←
MD_OK
g_csi00_tx_count
←
tx_num
gp_csi00_tx_address
←
tx_buf
gp_csi00_rx_address
←
rx_buf
SIO00 register
←
*
gp_csi00_tx_address
gp_csi00_tx_address
←
gp_csi00_tx_address + 1
g_csi00_tx_count = g_csi00_tx_count
-
1
status
←
MD_ARGERROR
Initialize status flag
Number of transmit data < 1?
Set status flag to indicate error
Less than
Set number-of-transmit-
data counter
Set transmit data pointer
Set receive data pointer
Disable CSI00 interrupts
Set transmit data in
buffer register
Transmit data pointer + 1
Number-of-transmit-data
counter – 1
Set CSI00 interrupts
Function return value: status
g_csi00_tx_count: Variable in RAM
1 or more
[Argument] *tx_buf: Transmit data
tx_num: Number of transmit data
*rx_buf: Receive data
status: Variable in RAM
gp_csi00_tx_address: Variable in
RAM
gp_csi00_rx_address: Variable in
RAM
CSIMK00 bit ← 1
CSIMK00 bit ← 0

Renesas RL78/G13 Specifications

General

Brand	Renesas
Model	RL78/G13
Category	Computer Hardware
Language	English