30 Reference Switch TB9100 Reciter Service Manual
© Tait Electronics Limited January 2006
the crystal unit, and the frequency stability of the externally supplied
reference.
4.3 Reference Switch
The reference switch consists of the external reference detector, the
hardware switch, and the digital switch.
4.3.1 External Reference Detector
A discrete NPN dual transistor pair is used as a low level signal detector.
The Syn_Ref_Det signal has a high logic level when the externally supplied
signal has the correct level.
4.3.2 Hardware Switch
The hardware switch is implemented using a discrete dual transistor pair.
When the switch is off (default), it powers up the internal reference
12.8MHz TCXO and shuts down the external reference 12.8MHz VCXO.
When the switch is on, it powers up the external reference 12.8MHz
VCXO and shuts down the internal reference 12.8MHz TCXO.
4.3.3 Digital Switch
The digital switch is controlled by the RISC, which processes the
Syn_Ref_Det and Lock Detect signals from the external reference
synthesizer. The RISC controls the hardware switch using the
Syn_Ref_Ctrl signal. The hardware switch is on if the Syn_Ref_Det and
Lock Detect signals have a high logic level for a set time. In all other
conditions the hardware switch is off.
4.3.4 Internal/External Reference Clock Branch
A complementary emitter follower, using NPN/PNP dual transistors, forms
two clock buffer branches which distribute the internal or external
references to the rest of the system. The branches provide a reasonable drive
level at low impedance.
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