94 RF Circuitry TB9100 Reciter Service Manual
© Tait Electronics Limited January 2006
To prevent overload of the ADC, the peak level at its input should not
exceed 0dBm. This corresponds to –30dBm at the antenna connector, and
approximately –22dBm at the AGC pick-off point. The AGC operates over
a range of approximately 11dB.
The AGC circuit can be enabled or disabled using the CSS.
6.3 Exciter RF Circuitry
Refer to Figure 6.4 on page 95 and Figure 6.5 on page 97.
6.3.1 Frequency Control Loop
Audio modulation of the exciter synthesizer is implemented in the
frequency control loop (FCL). It uses a three-point modulation scheme
involving the FCL_VCXO and VCO signals.
The FCL consists of reference oscillators, clock buffers, twisted ring counter
phase detectors, low pass filters (LPFs), ADCs, the FCL processor and
digital-to-analog converters (DACs).
Reference
Oscillators
Modulation to the FCL_VCXO reference oscillator requires the use of the
FCL_VCXO_CTRL and SYN_VCO_MOD signals to apply:
■ a constant DC offset to the FCL_VCXO signal until it achieves
frequency lock to the internal referenced TCXO;
■ frequency modulation to the FCL_VCXO and VCO simultaneously
from the transmit audio signal; the transmit audio signal has a range of 0
to 3kHz.
The modulated signal from the VCXO is attenuated by the bandwidth of
the loop filter in the low pass filter (i.e. 150Hz). To obtain flat modulation
across the audio band, the VCO is also modulated simultaneously to obtain
a composite high pass filter response. Figure 6.4 shows the relationships
between the frequency modulation gain characteristics of the VCXO and
VCO.
Clock Buffers The TCXO and VCXO signals are squared up and buffered as digital
signals using hex inverters.
Twisted Ring
Counter
The VCXO and TCXO signals are phase shifted and multiplied by XOR
(exclusive_or) logic. This is achieved using a twisted ring counter, which
also divides both signals by four.
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