4-28 | ni.com
Chapter 4 Analog Input
Figure 4-19. AI Convert Clock Too Fast For AI Sample Clock; AI Convert Clock Pulses Are
Gated Off
Figure 4-20. AI Sample Clock and AI Convert Clock Improperly Matched;
Leads to Aperiodic Sampling
Figure 4-21. AI Sample Clock and AI Convert Clock Properly Matched
It is also possible to use a single external signal to drive both AI Sample Clock and AI Convert
Clock at the same time. In this mode, each tick of the external clock causes a conversion on the
ADC. Figure 4-22 shows this timing relationship.
Figure 4-22. One External Signal Driving Both Clocks Simultaneously
AI Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
1230
12301230
Channel Measured
AI Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
1230
0
Channel Measured
1230
AI Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
Channel Measured 1 2 30
12301230
AI Sample Clock
AI Convert Clock
Sample #1 Sample #2 Sample #3
1230
12301…0
Channel Measured