Nvidia Jetson Orin Nano Series User Manual

USB and PCIe
PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | 28
Pin
#
Module Pin
Name
Orin SoC Pin Name
(See Note 4)
Usage and Description
Recommended
Usage
Direction
Pin
Type
173
PCIE1_CLK_N
SF_PCIE1_CLK_N
PCIe #1 Reference Clock (PCIe Ctrl #1)
Output
PCIe PHY
175
PCIE1_CLK_P
SF_PCIE1_CLK_P
40
CSI4_D2_N
HS_UPHY2_L0_RX_
N
PCIe 2 Receive 0 (PCIe Ctrl #7 Lane 0)
PCIe x2 (Ctrl #7)
or 2 x PCIe x1
(Ctrl #7 and Ctrl
#9)
Input
PCIe PHY
42
CSI4_D2_P
HS_UPHY2_L0_RX_P
PCIe 2 Receive 0+ (PCIe Ctrl #7 Lane 0)
Input
PCIe PHY
58
CSI4_D1_N
HS_UPHY2_L1_RX_
N
PCIe #2 Receive 1 (PCIe Ctrl #7 Lane 1) or
PCIe #3 Receive 0 (PCIe Ctrl #9 Lane 0)
Output
PCIe PHY
60
CSI4_D1_P
HS_UPHY2_L1_RX_P
PCIe #2 Receive 1+ (PCIe Ctrl #7 Lane 1) or
PCIe #3 Receive 0+ (PCIe Ctrl #9 Lane 0)
Output
PCIe PHY
46
CSI4_D0_N
HS_UPHY2_L0_TX_N
PCIe #2 Transmit 0 (PCIe Ctrl #7 Lane 0)
Output
PCIe PHY
48
CSI4_D0_P
HS_UPHY2_L0_TX_P
PCIe #2 Transmit 0+ (PCIe Ctrl #7 Lane 0)
Output
PCIe PHY
64
CSI4_D3_N
HS_UPHY2_L1_TX_N
PCIe #2 Transmit 1 (PCIe Ctrl #7 Lane 1)
or PCIe #3 Transmit 0 (PCIe Ctrl #9 Lane
0)
Output
PCIe PHY
66
CSI4_D3_P
HS_UPHY2_L1_TX_P
PCIe #2 Transmit 1+ (PCIe Ctrl #7 Lane 1)
or PCIe #3 Transmit 0+ (PCIe Ctrl #9 Lane
0)
Output
Open
Drain 3.3V
52
CSI4_CLK_N
SF_PCIE7_CLK_N
PCIe #2 Reference Clock (PCIe Ctrl #7)
Input
Open
Drain 3.3V
54
CSI4_CLK_P
SF_PCIE7_CLK_P
PCIe #2 Reference Clock+ (PCIe Ctrl #7)
Input
PCIe PHY
219
SDMMC_DAT0
GP188_PCIE7_RST_
N
-up
to 3.3V on the module.
Output
PCIe PHY
221
SDMMC_DAT1
GP187_PCIE7_
CLKREQ_N
PCIE #2 Clock Request (PCIe Ctrl #7).
-up to 3.3V on the module.
Bidir
Open
Drain 3.3V
229
SDMMC_CLK
SF_PCIE9_CLK_P
PCIe #3 Reference Clock+ (PCIe Ctrl #9)
PCIe x1 (Ctrl #3)
Output
Open
Drain 3.3V
227
SDMMC_CMD
SF_PCIE9_CLK_N
PCIe #3 Reference Clock (PCIe Ctrl #9)
Output
PCIe PHY
223
SDMMC_DAT2
GP192_PCIE9_RST_
N
-up
to 3.3V on the module.
Output
PCIe PHY
225
SDMMC_DAT3
GP191_PCIE9_
CLKREQ_N
PCIE #3 Clock Request (PCIe Ctrl #9).
-up to 3.3V on the module.
Bidir
PCIe PHY
179
PCIE_WAKE*
GP185_PCIE_WAKE_
N
-up to 3.3V on the
module.
Shared between
PCIe interfaces.
Input
Open
Drain 3.3V
161
USBSS_RX_N
HS_UPHY0_L0_RX_
N
USB 3.2 Receive (Port #0)
USB 3.2
connector,
device or hub
Input
USB 3.2
PHY
163
USBSS_RX_P
HS_UPHY0_L0_RX_P
166
USBSS_TX_N
HS_UPHY0_L0_TX_N
USB 3.2 Transmit (Port #0)
Output
USB 3.2
PHY
168
USBSS_TX_P
HS_UPHY0_L0_TX_P
39
DP0_TXD0_N
HS_UPHY0_L1_RX_
N
USB 3.2 Receive (Port #1)
USB 3.2
connector,
device or hub
Input
USB 3.2
PHY
41
DP0_TXD0_P
HS_UPHY0_L1_RX_P
45
DP0_TXD1_N
HS_UPHY0_L1_TX_N
USB 3.2 Transmit (Port #1)
Output
USB 3.2
PHY
47
DP0_TXD1_P
HS_UPHY0_L1_TX_P

Nvidia Jetson Orin Nano Series Specifications

General

Brand	Nvidia
Model	Jetson Orin Nano Series
Category	Control Unit
Language	English