Nvidia Jetson Orin Nano Series User Manual

MIPI CSI Video Input
PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | 63
Parameter
Requirement
Units
Notes
Max trace delay skew between DQ and CLK
1 / 1.5 / 2.5 Gbps
40 / 26.7 / 16
ps
DQ includes all the data lines
associated with a single clock.
This may be 2 differential data
lanes for a x2 interface, or 4
differential data lanes for a x4
interface.
Keep critical traces away from other signal traces or unrelated power traces/areas or power supply components
Note: Any EMI/ESD devices must be tuned to minimize impact to signal quality and meet the timing and Vil/Vih requirements at
the receiver and maintain signal quality and meet requirements for the frequencies supported by the design.
Table 10-5. MIPI CSI Signal Connections
Module Pin Name
Type
Termination
Description
CSI[3:0]_CLK_N/P Camera
#[4:1]
I
See note
CSI Differential Clocks: Connect to clock pins of camera. See
Table 10-3 for details
CSI[3:0]_D[1:0]_N/P Camera
#[4:1]
I
See note
CSI Differential Data Lanes: Connect to data pins of camera. See
Table 10-3 for details
Table 10-6. Miscellaneous Camera Connections
Module Pin Name
Type
Termination
Description
CAM_I2C_CLK
CAM_I2C_DAT
O
I/O
21.5 k pull-ups
VDD_3V3_SYS (on
Orin module).
Camera I2C Interface: Connect to I2C SCL and SDA pins of imager.
CAM[1:0]_MCLK
GPIO01 (opt. MCLK2)
GPIO11 (opt. MCLK3)
O
Camera Initiator Clocks: Connect to camera reference clock
inputs.
CAM[1:0]_PWDN
O
Camera Power Control signals (or GPIOs [1:0]): Connect to
power down pins on camera(s).

Nvidia Jetson Orin Nano Series Specifications

General

Brand	Nvidia
Model	Jetson Orin Nano Series
Category	Control Unit
Language	English