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Nvidia Jetson Orin Nano Series User Manual

Nvidia Jetson Orin Nano Series
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USB and PCIe
PRELIMINARY INFORMATION
Jetson Orin NX Series and Jetson Orin Nano Series DG-10931-001_v1.1 | 36
7.2 PCIe
Orin module brings four PCIe interfaces to the module pins for up to seven total lanes (1 x4 + 1
x1 + 1x2) for use on the carrier board. The PCIe x4 interface (PCIE0) operates up to Gen4 speed
and supports both Root Port and Endpoint operation. The PCIe x1 interface (PCIE1) operates
up to Gen4 speed and support only Root Port operation. The PCIe x2 interface (PCIE2) can also
be broken into two x1 interfaces (PCIE2 x1 and PCIE3 x1). PCIE2 and PCIE3 operate up to Gen4
speed and support only Root Port operation. Figure 7-5 shows all possible interfaces as Root
Ports. Figure 7-6 shows the x4 interfaces as an Endpoint. Lane reversal and polarity inversion
(P/N swapping) is supported per controller.
Figure 7-5. PCIe Root Port Connections Example
Jetson
SoC - PCIe
UPHY0
GP177_PCIE1_CLKREQ_N
GP178_PCIE1_RST_N
GP185_PCIE_WAKE_N
PEX
Ctrl
HS_UPHY0_L7_TX_N/P
PCIe 0 Lane 3
PCIe 0 Lane 2
PCIe 0 Lane 1
PCIe 0 Lane 0
HS_UPHY0_L7_RX_N/P
HS_UPHY0_L6_TX_N/P
HS_UPHY0_L6_RX_N/P
HS_UPHY0_L5_TX_N/P
HS_UPHY0_L5_RX_N/P
HS_UPHY0_L4_TX_N/P
HS_UPHY0_L4_RX_N/P
3.3V
180
181
179
PCIe 0 (Ctrl #4) 
PCIe x4 conn/device
(i.e. M.2 Key M)
4.7k
47k
154/156
155/157
148/150
149/151
140/142
137/139
134/136
131/133
SF_PCIE1_CLK_N/P
HS_UPHY0_L3_RX_N/P
167/169
173/175
PCIe 0 (Ctrl #4) 
PCIe x4 conn/device
(i.e. M.2 Key M)
HS_UPHY0_L3_TX_N/P
172/174
PCIe 1 (Ctrl #1)
PCIe x1 conn/device
(i.e. M.2 Key E)
GP183_PCIE4_CLKREQ_N
GP184_PCIE4_RST_N
182
183
PCIe 1 (Ctrl #1) 
PCIe x1 conn/device
(i.e. M.2 Key E)
4.7k
47k
Shared wake pin
HS_UPHY0_REFCLK2_N/P
160/162
SF_PCIE4_CLK_N/P
Mux
SEL
GP21
GP21
HS_UPHY0 _REFCLK2/
SF_PCIE4_CLK Mux Control
See Note 1
See Note 2
SF_PCIE7_CLK_N/P
HS_UPHY2_L1_RX_N/P
HS_UPHY2_L1_TX_N/P
64/66
PCIe 1 L1
PCIe 2 (Ctrl #7)
PCIe x2
Or
PCIe 2 (Ctrl #7)
PCIe x1 (Lane 0) and
PCIe 3 (Ctrl #9)
PCIe x1 (Lane 1)
HS_UPHY2_L0_RX_N/P
HS_UPHY2_L0_TX_N/P
PCIe 1 L0
58/60
46/48
40/42
52/54
SF_PCIE9_CLK_N
SF_PCIE9_CLK_P
227
GP191_PCIE9_CLKREQ_N
GP192_PCIE9_RST_N
3.3V
47k
4.7k
47k
PCIe 3 (Ctrl #9)
PCIe x1)
GP187_PCIE7_CLKREQ_N
GP188_PCIE7_RST_N
PCIe 2 (Ctrl #7)
PCIe x2 or x1)
4.7k
47k
221
219
225
223
PCIE2_TX1_N/P
PCIE2_RX1_N/P
PCIE2_TX0_N/P
PCIE2_RX0_N/P
PCIE2_CLK_N/P
PCIE3_CLK_N
PCIE3_CLK_P
229
UPHY2
PCIE0_TX3_N/P
PCIE0_RX3_N/P
PCIE0_TX2_N/P
PCIE0_RX2_N/P
PCIE0_TX1_N/P
PCIE0_RX1_N/P
PCIE0_TX0_N/P
PCIE0_RX0_N/P
PCIE0_CLK_N/P
CSI4_D3_N/P
CSI4_D1_N/P
CSI4_D0_N/P
CSI4_D2_N/P
CSI4_CLK_N/P
SDMMC_CMD
SDMMC_CLK
PCIE1_TX0_N/P
PCIE1_RX0_N/P
PCIE1_CLK_N/P
PCIE0_CLKREQ*
PCIE0_RST*
PCIE1_CLKREQ*
PCIE1_RST*
SDMMC_DAT1
SDMMC_DAT0
SDMMC_DAT3
SDMMC_DAT2
PCIE_WAKE*
PCIE2_CLKREQ*
PCIE2_RST*
PCIE3_CLKREQ*
PCIE3_RST*

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Nvidia Jetson Orin Nano Series Specifications

General IconGeneral
BrandNvidia
ModelJetson Orin Nano Series
CategoryControl Unit
LanguageEnglish

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