Block
3
Block
4-
Block
5
Block 6
Block 7
Block 8
Input/Output
Operation
•
If
the device is not busy, a
test
is made to see
if
the
Chain Command
(CC) flag is set.
If
it
is not, control is
transferred
to Block 8 which causes
termination
of
the
command to occur.
•
If
the
Chain Command (CC) flag is set, a
test
is made to see
if
one of
the
following bits is set in the channel
status
byte:
Program
Check
bit
Protection Check
bit
Data
Check
bit
(This
bit
is checked only
if
the
current
operation is a
write)
Channel Control Check
bit
If
any
of
the
above bits
are
set
(except
the
data
check
bit
on a Read) con-
trol
is
transferred
to
Block 8 which causes
temlination
of
the
command
and
suppression
of
command chaining to occur.
•
If
none
of
the
bits tested in
the
channel byte
are
set, a
test
is made to
see
if
the
Chain
Data
(CD) flag is set.
If
the
Chain
Data
flag is set, control
is
transferred
to Block 8 which causes
termination
of
the
command
and
suppression
of
command chaining to occur.
•
If
the
Chain
Data
(CD) flag is
not
set
the
standard
device
byte
is tested
to see
that
the
following conditions
are
present:
Device is operable
Secondary indicator is
not
set
Device end is
set
If
any
of
the
above conditions is
not
present, control is
transferred
to Block
8 which causes
termination
of
the
command
and
suppression
of
command
chaining to occur.
•
If
all
of
the
conditions tested in
the
standard
device byte
are
present, a
test
is made to see
if
the
byte count is not equal to zero
and
the
Suppress
Length
Indicator
(SLI)
flag is equal to zero.
If
these conditions
are
pres-
ent,
the
program
desires
an
indication of incorrect length,
and
control is
transferred
to Block 8 which causes
termination
of
the
command
and
suppression of command chaining to occur.
•
Entry
to
this
block occurs
under
the
following conditions:
a. A device control electronics
has
indicated
and
end condition,
the
device is
not
busy
and
the
chain command flag
bit
is not set.
b. A device control electronics
has
indicated
an
end condition
and
the
chain command flag is set. However, a condition is
present
which
causes command chaining to be suppressed.
The processor tells
the
device control electronics to
set
a channel
interrupt
condition
for
the
appropriate
channel.
73
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