SARA-R4/N4 series - System Integration Manual
UBX-16029218 - R11 Design-in Page 112 of 157
☞ Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k resistor on
the board in series to the GPIO of SARA-R4/N4 series modules.
☞ Do not apply voltage to any GPIO of the module before the switch-on of the GPIOs supply (V_INT), to
avoid latch-up of circuits and allow a clean module boot. If the external signals connected to the module
cannot be tri-stated or set low, insert a multi-channel digital switch (e.g. TI SN74CB3Q16244, TS5A3159,
TS5A63157) between the two-circuit connections and set to high impedance before V_INT switch-on.
☞ ESD sensitivity rating of the GPIO pins is 1 kV (Human Body Model according to JESD22-A114).
Higher protection level could be required if the lines are externally accessible and it can be achieved by
mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible points.
☞ If the GPIO pins are not used, they can be left unconnected on the application board.
2.8.2 Guidelines for general purpose input/output layout design
The general purpose inputs / outputs pins are generally not critical for layout.
To Next Page
Loading...
Need help?
General
