Xilinx ML605 User Manual

ML605 Hardware User Guide www.xilinx.com 63
UG534 (v1.2.1) January 21, 2010
Detailed Description
20. VITA 57.1 FMC LPC Connector
The ML605 implements both the High Pin Count (HPC, J64) and Low Pin Count (LPC, J63)
connector options of VITA 57.1.1 FMC specification. This section discusses the FMC LPC
J63 connector.
The FMC standard calls for two connector densities: a High Pin Count (HPC) and a Low
Pin Count (LPC) implementation. A common 10 x 40 position (400 pin locations) connector
form factor is used for both versions. The HPC version is fully populated with 400 pins
present, and the LPC version is partially populated with 160 pins.
The 10 x 40 rows of a FMC LPC connector provides connectivity for:
• 68 single-ended or 34 differential user defined signals
• 1 MGT
• 1 MGT clock
• 2 differential clocks
• 61 ground, 10 power connections
Of the above signal and clock connectivity capability, the ML605 implements the full set:
• 34 differential user-defined pairs:
♦ 34 LA pairs
• 1 MGT
• 1 MGT clock
• 2 differential clocks
Signaling Speed Ratings:
• Single-ended: 9 GHz / 18 Gb/s
• Differential
♦ Optimal Vertical: 9 GHz / 18 Gb/s
♦ Optimal Horizontal: 16 GHz / 32 Gb/s
♦ High Density Vertical 7 GHz / 15 Gb/s
Mechanical specifications:
• Samtec SEAM/SEAF Series
• 1.27mm x 1.27mm (0.050" x 0.050") pitch
The Samtec connector system is rated for signaling speeds up to 9 GHz (18 Gb/s) based on
a -3 dB insertion loss point within a two-level signaling environment.
Note:
The ML605 board VADJ voltage for the FMC HPC and LPC connectors (J64 and J63) is fixed
at 2.5V (non-adjustable). The 2.5V rail cannot be turned off. The ML605 VITA 57.1 FMC interfaces
are compatible with 2.5V mezzanine cards capable of supporting 2.5V VADJ.

Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English