Name: Xilinx Platform Cable USB II
Brand: Xilinx
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Platform Cable USB II

DS593 (v1.2.1) March 17, 2011 www.xilinx.com

X-Ref Target - Figure 19

Figure 19: V

REF

Current vs. V

REF

Voltage

X-Ref Target - Figure 20

Figure 20: Target Interface Driver Topology

DS593_19_021408

FPGA

NC7SZ126

Output

High-Z Control

I/O Pin

2-mm Connector

BAT54

REF_CLAMP

30.1Ω

20 kΩ

To input buffer

DS593_20_021408

Features1
Platform Cable USB II Description1
Reliable1
Xilinx Platform Cable USB II2
Physical Description3
Operation3
Minimum Host System Requirements3
Plastic Case Physical Description3
Operating Power4
Platform Cable USB II Software Compatibility4
Device Driver Installation4
Firmware Updates4
Hot Plug and Play5
Connecting to the Cable in Impact5
Establishing a Connection5
Option 1: Cable Auto Connect5
Manual Cable Connect6
Multiple USB Cable Management7
Configuration Clock Speed7
Cable Setup Information7
Maximum JTAG Clock Frequencies8
Impact Cable Status Bar9
Status Indicator9
Interpreting the Status LED10
System Suspend11
Platform Cable USB II Connections11
High Performance Ribbon Cable11
Flying Wire Adapter12
Flying Wire Adaptor (Top) with Wires12
Physical Connection to the Host13
Standard A-B Host Interface Cable and Series B Receptacle13
Target Interface Connectors14
Target System Connections15
JTAG and Slave Serial15
Example of JTAG Chain Topology15
Example Using PGND in a JTAG Chain16
Direct SPI17
Example of Cascaded Slave-Serial Topology17
Indirect SPI18
Example of Direct SPI Topology18
Target Interface Reference Voltage and Signals19
Target Reference Voltage Sensing (VREF)19
Bidirectional Signal Pins19
Output Driver Structure19
Target Interface Driver Topology20
Input Receive Structure21
Target Interface Receiver Topology21
Pseudo Ground Signal22
HALT_INIT_WP Signal in Impact22
PGND Signal22
Timing Specifications23
TDO/MISO Timing Considerations23
Enabling the HALT Signal in Impact (9.2I)23
Signal Integrity27
TDO Sampling Example at 12 Mhz27
Differential Clock Buffer Example27
USB Hub Types and Cable Performance28
Maximum Port Current28
Total Bandwidth28
Interface Pin Descriptions29
Jtag/Spi/Slave Serial Port: 2-MM Connector Signals29
Platform Cable USB II Operating Characteristics31
Absolute Maximum Ratings31
Recommended DC Operating Conditions32
DC Electrical Characteristics32
Switching Characteristics32
USB-IF Compliance33
Platform Cable USB II Timing Diagram33
FCC Notice34
Industry Canada Information34
Ordering Information34
Marking Information34
Revision History35
Notice of Disclaimer35

Brand	Xilinx
Model	Platform Cable USB II
Category	Motherboard
Language	English

Xilinx Platform Cable USB II User Manual

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Xilinx Platform Cable USB II Specifications

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