IBM 5150 Hardware Reference Manual

T/C
DRQI-DRQ3
I DMA Request 1 to 3: These lines are asynchro-
nous channel requests used by peripheral de-
vices to gain
DMA service. They are prioritiz-
ed with
DRQ 1 having highest priority and
DRQ3 the lowest. A request
is generated by
bringing a
DRQ line to an active level (HIGH).
A
DRQ line must be held high until the 1"""""\
corresponding DACK line goes active.
DACKO-
o -DMA Acknowledge 0 to 3: These lines are
DACK3
used to acknowledge
DMA requests (DRQ 1-
DRQ3) and to refresh system dynamic mem-
ory (DACKO). They are active LOW.
AEN
o Address Enable: This line is used to degate the
processor and other devices from the
I/O
Channel to allow Direct Memory Access
(DMA) transfers to take place. When this line
is active (HIGH), the DMA Controller has
control
of the address bus, data bus, read
command lines, (memory and I/O), and the
write command lines, (memory and I/O.
o Terminal Count: This line provides a pulse
when the terminal count for any
DMA channel 1"""""\
is reached. This signal is active HIGH.
The following voltages are available on the System Board 1/ 0 Channel:
+5 Vdc + 5%, Located on 2 connector pins.
-5 V dc + 10%, Located on 1 connector pin.
+12 Vdc + 5%, Located on 1 connector pin.
-12 Vdc
+ 10%, Located on 1 connector pin.
GND (Ground), Located on 3 connector pins.
2-12

IBM 5150 Specifications

General

Brand	IBM
Model	5150
Category	Desktop
Language	English