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Appendix C
Programming Instructions and
Execution Times
In the operand column, I refers to input bits, O to output bits, W to work bits, D to bits in the designated area,
LR to Link Relay bits, DR to Data Retention bits, and TC to timer and counter Completion Flags and PVs. Re-
fer to 3-2 Memory Areas for details on bit and word designation.
Basic Instructions
Name/
mnemonic
Symbol Key inputs Description Operands*
LOAD
LD
Bit address
LD
ENT
Creates a normally open condition as the first condition
off the bus bar. All instruction lines begin with either
LOAD or LOAD NOT.
B:
I/O
W
D (03 and 04)
LR
DR
TC
LOAD NOT
LD NOT
LD
ENT
NOT
Bit address
Creates a normally closed condition as the first
condition off the bus bar. All instruction lines begin with
either LOAD or LOAD NOT.
B:
I/O
W
D (03 and 04)
LR
DR
TC
AND
AND
ENT
AND
Bit address
Combines a normally open condition in series with a
previous condition.
B:
I/O
W
D (03 and 04)
LR
DR
TC
AND NOT
AND NOT
AND
ENT
NOT
Bit address
Combines a normally closed condition in series with a
previous condition.
B:
I/O
W
D (03 and 04)
LR
DR
TC
OR
OR
OR
ENT
Bit address
Combines a normally open condition in parallel with a
previous condition.
B:
I/O
W
D (03 and 04)
LR
DR
TC
OR NOT
OR NOT
ENT
NOT
Bit address
OR
Combines a normally closed condition in parallel with a
previous condition.
B:
I/O
W
D (03 and 04)
LR
DR
TC
AND LOAD
AND LD
ENTLDAND
Combines two groups of conditions in series. These
groups are called blocks.
---
OR LOAD
OR LD
ENTLDOR
Combines two parallel groups of conditions. These
groups are called blocks.
---
OUTPUT
OUT
ENT
Bit address
OUT
Specifies an output bit that is to be turned ON for an
ON execution condition and OFF for an OFF condition.
B:
O
W
LR
DR
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