LTE Standard Module Series
EG915U_Series_Hardware_Design 32 / 81
Figure 7: Power Supply Limits during Burst Transmission
To decrease the voltage drop, use bypass capacitors of about 100 µF with low ESR (ESR = 0.7 Ω) and
reserve a multi-layer ceramic chip (MLCC) capacitor array due to their ultra-low ESR. It is recommended
to use three ceramic capacitors (100 nF, 33 pF, 10 pF) for composing the MLCC array, and place these
capacitors close to the VBAT_SENSE and VBAT_RF pins. When the external power supply is connected
to the module, VBAT_SENSE and VBAT_RF need to be routed in star structure. The width of the
VBAT_RF trace should not be less than 2.5 mm. When used as a power supply pin (that is, without
charging function), the width of the VBAT_SENSE trace should not be less than 1 mm. In principle, the
longer the VBAT trace is, the wider it will be.
In addition, to avoid the surge, use a TVS diode of which reverse working voltage is 4.7 V and peak pulse
power is up to 2550 W. The reference circuit is shown as below:
Figure 8: Power Supply
3.5. Turn on
3.5.1. Turn on with PWPKEY
Table 7: Pin Definition of PWRKEY
When the module is in power down mode, you can turn it on to normal mode by driving the PWRKEY pin
low for at least 2 s. It is recommended to use an open drain/collector driver to control the PWRKEY. A
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