Quectel LPWA Series Hardware Design

LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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3.2. Sleep Mode*
BG950A-GL & BG951A-GL can reduce their current consumption to a lower value during the sleep mode.
The following sub-chapters describe the power saving procedure of BG950A-GL & BG951A-GL.
3.2.1. UART Application Scenario
If the host communicates with the module via UART interface, the following preconditions can let the
module enter sleep mode:

Execute AT+QSCLK=2 to enable sleep mode.
 Drive MAIN_DTR high.

Pull the PON_TRIG pin low.
The figure illustrates the connection between the module and the host.
Figure 3: Sleep Mode Application via UART Interface
 Driving the module's MAIN_DTR low will wake up the module.

When the module has a URC to report, MAIN_RI* signal will wake up the host. See Chapter 4.6.4 for
details about MAIN_RI* behavior.
 AP_READY* will detect the sleep state of the host (can be configured to high voltage level or low
voltage level detection). See AT+QCFG="apready" in document [2] for details.
During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB
interface will increase power consumption.
NOTE

Quectel LPWA Series Specifications

General

Brand	Quectel
Model	LPWA Series
Category	GSM/GPRS Modules
Language	English