Table 9. CAN‑FD3 - Solder bridge configuration
Solder bridge
Setting
(1)
Configuration
SB29, SB30
SB29, SB30 ON
TXD and RXD of MCD2562FD are connected to PF7 (FDCAN3_TX)
and PF6 (FDCAN3_RX) of STM32H735IGK6U MCU.
SB29, SB30 OFF
(CAN‑FD3 bus not connected)
TXD and RXD of MCD2562FD are disconnected to PF7
(FDCAN3_TX) and PF6 (FDCAN3_RX) of STM32H735IGK6U MCU.
1. The default setting is in bold.
7.8
Octo-SPI NOR Flash memory
The STM32H735G-DK board includes a 512-Mbit Octo-SPI NOR Flash memory device (MX25LM51245GXDI00
from MACRONIX), which is connected to the OCTOSPI1 interface of the STM32H735IGK6U microcontroller.
MX25LM51245GXDI00 operates in a single transfer rate (STR) or double transfer rate (DTR) mode.
The RESETn of the Flash memory is connected to the general reset (NRST) of the STM32H735G-DK board.
7.9
HyperRAM
™
memory
The STM32H735G-DK board adds an external 128-Mbit HyperRAM
™
(S70KL1281DABHI023 from Cypress) that
is connected to the STM32H735IGK6U via the OCTOSPI2 interface.
7.10 Virtual COM port
The serial interface USART3 (PD8/PD9) that supports the bootloader is directly available as a Virtual COM port of
the PC connected to STLINK-V3E USB connector CN15. The VCP configuration is the following:
• 115200 bps
• 8-bit data
• No parity
• One-stop bit
• No flow control
7.11
TAG
One TAG interface footprint (CN21) is reserved on the STM32H735G-DK board, which can be used for the board
debugging and programming.
7.12 Buttons and LEDs
The black button (B1) located on the top side is the reset of the STM32H735IGK6U microcontroller.
The blue button (B2) located on the top side is to be used as a digital input or as a wakeup-alternate function.
When the button is depressed the logic state is LOW, otherwise, the logic state is HIGH.
UM2679
Octo-SPI NOR Flash memory
UM2679 - Rev 1
page 18/42
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