initialization concludes by enabling the thermal monitoring blocks and thermal shutdown protection, along with
the ADC, CRC, GPIO and NVIC blocks.
9.4.3 I
2
C Configuration
The TPS65982 features dual I
2
C busses with configurable addresses. The I
2
C addresses are determined
according to the flow depicted in Figure 9-55. The address is configured by reading device GPIO states at boot
(refer to the I
2
C Pin Address Setting section for details). Once the I
2
C addresses are established the TPS65982
enables a limited host interface to allow for communication with the device during the boot process.
Read state of
DEBUG_CTL1
DEBUG_CTL2
I2C_ADDR
Configure I C
2
Address
Initialize Host
Interface
Initialization
Complete
Figure 9-55. I
2
C Address Configuration
9.4.4 Dead-Battery Condition
After I
2
C configuration concludes the TPS65982 checks VIN_3V3 to determine the cause of device boot. If the
device is booting from a source other than VIN_3V3, the dead battery flow is followed to allow for the rest of the
system to receive power. The state of the BUSPOWERZ pin is read to determine power path configuration for
dead battery operation. After the power path is configured, the TPS65982 will continue through the boot process.
Figure 9-56 shows the full dead battery process.
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TPS65982
SLVSD02E – MARCH 2015 – REVISED AUGUST 2021
Copyright © 2021 Texas Instruments Incorporated
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