Xilinx Spartan-6 LX9 User Manual

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Avnet Electronics Marketing 19 of 28 Rev D 24 Apr 2015
2.5 User I/O and Expansion Connectors
2.5.1 Peripheral Module (PMOD)
Two 12-pin (2 x 6 female) Peripheral Module (PMOD) headers (J4, J5) are interfaced to the FPGA, with each
header providing 3.3 V power, ground, and eight I/O’s. These headers may be utilized as general-purpose I/Os
or may be used to interface to PMODs. J4 and J5 are placed in close proximity (0.9”-centers) on the PCB in
order to support dual PMODs. Table 10 and Table 11 provide the connector and FPGA pinout. For Digilent
PMODs see: http://www.digilentinc.com/pmods
Table 10 – Peripheral Module Connections – J4
FPGA
pin #
I/O Signal
Connector
Pin #
Connector
Pin #
I/O Signal
FPGA
pin #
H12 FPGA_PMOD2_P1 1 7 FPGA_PMOD2_P7 K12
G13 FPGA_PMOD2_P2 2 8 FPGA_PMOD2_P8 K13
E16 FPGA_PMOD2_P3 3 9 FPGA_PMOD2_P9 F17
E18 FPGA_PMOD2_P4 4 10 FPGA_PMOD2_P10 F18
-
GND
5 11
GND
-
-
+3.3V_LS1
6 12
+3.3V_LS1
-
Table 11 – Peripheral Module Connections – J5
FPGA
pin #
I/O Signal
Connector
Pin #
Connector
Pin #
I/O Signal
FPGA
pin #
F15 FPGA_PMOD1_P1 1 7 FPGA_PMOD1_P7 F14
F16 FPGA_PMOD1_P2 2 8 FPGA_PMOD1_P8 G14
C17 FPGA_PMOD1_P3 3 9 FPGA_PMOD1_P9 D17
C18 FPGA_PMOD1_P4 4 10 FPGA_PMOD1_P10 D18
-
GND
5 11
GND
-
-
+3.3V_LS1
6 12
+3.3V_LS1
-
Figure 8 – PMOD Connector Pinout
7 8 9 10 11 12
1 2 3 4 5 6
7 8 9 10 11 12
1 2 3 4 5 6

Xilinx Spartan-6 LX9 Specifications

General

Brand	Xilinx
Model	Spartan-6 LX9
Category	I/O Systems
Language	English