Xilinx Virtex-7 FPGA VC7222 IBERT User Manual

VC7222 IBERT Getting Started Guide www.xilinx.com 39
UG971 (v5.0) June 12, 2014
SuperClock-2 Frequency Table
Closing the IBERT Demonstration
To stop the IBERT demonstration:
1. Close the Vivado Design Suite by selecting File > Exit.
2. Place the main power switch SW1 in the OFF position.
SuperClock-2 Frequency Table
Table 1-2 lists the addresses for the frequencies that are programmed into the SuperClock-2
read-only memory (ROM).
Table 1-2: Si570 and Si5368 Frequency Table
Address Protocol
Frequency
(MHz)
Address Protocol
Frequency
(MHz)
Address Protocol
Frequency
(MHz)
0 100GE/40GE/10GE 161.30 30 OBSAI 307.2 60 XAUI 156.25
1 Aurora 81.25 31 OBSAI 614.4 61 XAUI 312.5
2 Aurora 162.5 32 OC-48 19.44 62 XAUI 625
3 Aurora 325 33 OC-48 77.76 63 Generic 66.667
4 Aurora 650 34 OC-48 155.52 64 Generic 133.333
5 CE111 173.37 35 OC-48 311.04 65 Generic 166.667
6 CPRI 61.44 36 OC-48 622.08 66 Generic 266.667
7 CPRI 122.88 37 OTU-1 166.629 67 Generic 333.333
8 CPRI 153.63 38 OTU-1 333.257 68 Generic 533.333
9 CPRI 245.76 39 OTU-1 666.514 69 Generic 644
10 CPRI 491.52 40 OTU-1 666.75 70 Generic 666.667
11 Display Port 67.5 41 OTU-2 167.33 71 Generic 205
12 Display Port 81 42 OTU-2 669.31 72 Generic 210
13 Display Port 135 43 OTU-3 168.05 73 Generic 215
14 Display Port 162 44 OTU-4 174.69 74 Generic 220
15 Fibrechannel 106.25 45 PCIe 100 75 Generic 225
16 Fibrechannel 212.5 46 PCIe 125 76 Generic 230
17 Fibrechannel 425 47 PCIe 250 77 Generic 235
18 GigE 62.5 48 SATA 75 78 Generic 240
19 GigE 125 49 SATA 150 79 Generic 245
20 GigE 250 50 SATA 300 80 Generic 250
21 GigE 500 51 SATA 600 81 Generic 255
22 GPON 187.5 52 SDI 74.25 82 Generic 260
23 Interlaken 132.813 53 SDI 148.5 83 Generic 265
24 Interlaken 195.313 54 SDI 297 84 Generic 270
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Xilinx Virtex-7 FPGA VC7222 IBERT Specifications

General

Brand	Xilinx
Model	Virtex-7 FPGA VC7222 IBERT
Category	Motherboard
Language	English