Xilinx XC4000 Series User Manual

XC4000 Series Field Programmable Gate Arrays
4-18 September 18, 1996 (Version 1.04)
G'
G
1
• • • G
4
F
1
• • • F
4
WRITE
DECODER
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1 of 16
D
IN
16-LATCH
ARRAY
X6748
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4
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D
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16-LATCH
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ADDRESS

READ
ADDRESS
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WRITE PULSE
LATCH
ENABLE
LATCH
ENABLE
K
(CLOCK)
WRITE PULSE
MUX
4

4
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C
1
• • • C
4
4
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D
1
D
0
EC
Figure 7: 16x1 Edge-Triggered Dual-Port RAM

Xilinx XC4000 Series Specifications

General

Brand	Xilinx
Model	XC4000 Series
Category	Controller
Language	English