7-24
2.11.2 Chip general description
IC11 uses PanelLink Digital technology to support displays ranging from VGA to SXGA (25-135MHz) which
is ideal for desktop and specialty applications. The SiL161 receiver supports up to true color panels (24
bit/pixel, 16.7M colors) in 1 or 2 pixels/clock mode, and also features an inter-pair skew tolerance up to 1 full
input clock cycle. In addition, the receiver output data is time staggered to reduce ground bounce which
affects EMI. Since all PanelLink products are designed on scaleable CMOS architecture to support future
performance requirements while maintaining the same logical interface. System designers can be assured
that the interface will be fixed through a number of the technology and performance generations. PanelLink
Digital technology simplifies PC design by resolving many of the system level issues associated with
high-speed digital design, providing the system designer with a digital interface solution that is quicker to
market and lower in cost.
2.11.3 Features
Scaleable Bandwidth : SXGA(25-135MHz)
Low Power 3.3V core operation & power-down mode
High Skew Tolerance : 1 full input clock cycle (15ns at 65MHz)
Time staggered data output for reduced ground bounce
Sync Detect for Plug & Display “Hot Plugging”
Cable Distance Support : over 5m with twisted-pair, fiber-optics ready
Compliant with : VESA® P&D
TM
, VESA®FPDI-2
TM
, VESA®TMDS
TM
, DFP Port
Termination
Control
VCR
VCR
VCR
VCR
Data
Recovery
CH2
Data
Recovery
CH1
Data
Recovery
CH0
PLL
Channel
SYNC
Decoder
Panel
Interface
Logic
PIXS
DF
OCK_INV
EXT_RES
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
RXC+
RXC-
PDO
STAG_OUT
ST
SYNC2
SYNC1
SYNC0
SYNC2
SYNC1
SYNC0
DATA
CTL3
CTL2
CTL1
DATA
DATA
VSYNC
HSYNC
QE[23:0]
QO[23:0]
ODCK
DE
HSYNC
VSYNC
SDCT
CTL1
CTL2
CTL3
24
24
To Next Page
Need help?
General