Renesas R8C series User Manual

R8C/1A Group, R8C/1B Group 14. Timers
Rev.1.30 Dec 08, 2006 Page 129 of 315
REJ09B0252-0130
Figure 14.16 Registers TZMR and PUM in Timer Mode
Timer Z Waveform Output Control Register
Symbol Address After Reset
PUM
0084h 00h
Bit Symbol Bit Name Function RW
INT0
_
____
pin one-shot trigger
control bit
INT0
_
___
pin one-shot trigger
polarity select bit
0
b3 b2
INOSTG
b1 b0
0
—
(b4-b0)
00000
b7 b6 b5 b4
RW
TZOPL RW
0
Reserved bits Set to 0.
Timer Z output level latch Set to 0 in timer mode.
RW
INOSEG RW
Set to 0 in timer mode.
Set to 0 in timer mode.
Timer Z Mode Register
Symbol Address After Reset
TZMR
0080h 00h
Bit Symbol Bit Name Function RW
NOTES :
1.
2. Refer to
14.2.5 Notes on Timer Z
for precautions regarding the TZS bit.
RW
TZMOD0 RW
—
(b3-b0)
Reserved bits
Timer Z count start flag
(2)
0 : Stops counting.
1 : Starts counting.
0
RW
RW
0
Set to 0.
RW
Timer Z operating mode
bits
b5 b4
0 0 : Timer mode
0
TZMOD1
b7 b6 b5 b4
00
b0
When the TZS bit is set to 1 (count starts), the setting value in the TZWC bit is enabled. When the TZWC bit is set to
0, timer Z count value is w ritten to both reload register and counter. Timer Z count value is w ritten to the reload
register only w hen the TZWC bit is set to 1. When the TZS bit is set to 0 (count stops), timer Z count value is w ritten
to both reload register and counter regardless of the setting value of the TZWC bit.
TZWC
TZS
Timer Z w rite control bit
(1)
0 : Write to reload register and counter
1 : Write to reload register only
0
b3 b2 b1

Renesas R8C series Specifications

General

Brand	Renesas
Model	R8C series
Category	Computer Hardware
Language	English