6-1
BVM-D9H1U/D9H5U/D9H1E/D9H5E/D9H1A/D9H5A
Section 6
Circuit Descriptions
This section describes the circuit operations of the follow-
ing boards used in the BVM-D9H1/D9H5.
6-1. G board
6-2. B board
6-3. MA board
6-4. MB board
6-5. D board P1 and P2
6-6. P board
6-7. HA, HB and HC boards
6-8. HD board
6-1. G Board
Power supply of this monitor consists of the following two
switching regulators.
1. The power factor improvement regulator that is used to
comply with the power supply high frequency harmon-
ics regulations.
2. The main regulator that supplies the power to the
signal system, the deflection circuit and high voltage
circuit.
1. Power Factor Improvement Circuit
The power factor improvement circuit of this monitor uses
the active filter IC module (IC601) of the current-threshold
type boost-chopper system to comply with the power
supply high frequency harmonics regulations. In this
monitor, the output voltage Vpfc becomes always higher
than the peak value of the input voltage to the power
circuit. The output voltage Vpfc of this monitor is set to
about 370 V.
The power factor improvement circuit consists of IC666,
T602, C630 and C615.
IC666 is a module IC in which the control IC, the switch-
ing FET, the boost diode and input/output voltage detectors
are built in.
Basic operation of the power factor improvement block is
as follows. When the Vcc power is supplied to IC666, the
FET inside the module IC666 is turned on and an electric
current starts to flow in the primary winding of T602 and
the FET. This current increases with the slope of Vin
(rms)/L where L is the primary side’s inductance of T602.
This FET current is monitored by the source current
detection resistor that is connected between pin-4 and pin-
7 of IC666. When this FET current reaches the set value
that is specified by the multiplier inside the control IC, the
FET is turned off. Then an electric current flows through
the boost diode where the current decreases with the slope
of -(Vpfc - Vin (rms))/L. When this current reaches 0, the
FET is turned on. The current-threshold operation is thus
realized by the above described circuit operations.
In other words, the circuit operations that are described, are
performed as one-operation-cycle all the time while the
power is on. When you observe the circuit operations as
described above, during only the half-wave period of
commercial power line frequency, you will notice that ON/
OFF timing of the FET is controlled by the control IC so
that the envelope of the peak values of the choke current is
proportional to the half-wave of the sine waveform of the
power line frequency. As the result of this control,
waveform of the input voltage and that of the output
voltage become similar so that the power factor is im-
proved.
2. Main Regulator
The separately excited current composite resonance system
is used for the main regulator. The power regulation with
high efficiency and low noise is thus realized. The main
regulator consists of IC603, IC690, T604, C644, C623 and
the secondary side rectifier circuit of T604. IC603 is a
multiple chip module in which the four chips of the control
block, the FET drive block and the switching FET block
(high side and low side) are connected by bonding wire
inside the IC. The main regulator has the following circuit
configuration. A half-bridge rectifier is constructed by the
two FET switches, the two capacitors C644 and C623, and
the transformer T604 for the input voltage Vpfc. The
secondary side of the transformer has the full wave
rectifier having the center tap.
IC603 receives the control signal from IC690 that performs
the constant voltage control over the +13 V line through
the isolator PH601. The control signal changes the
oscillating frequency of IC603 so that the constant voltage
control is realized.
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