Tektronix 2235 User Manual

tra n sistors connected to R 38 a
n
d
t h
e
overall gain of t he

C h annel 1 a
n
d C
h annel 2 out p ut sig n als are t hen conducted
Am p lifier will d ecrease . P
otentiometer R 25 a dju sts t he bal-

to ground . Zener diode
VR 200 turns on and C R 200 and
ance of t he Amplifier so t h ere is minimal do
trace sh ift as t he

CR 201 become reverse
biased . T r igger V iew tra n sisto r s
V O L TS/DI VV ariable control is r otate d .

Q440 and Q441 are t
h
en
cou pled to t h e Delay L ine Driver
t h roug h forward-biased
d iodes CR 202 and C R 203 . T he crt
trace will t hen be α dis p
lay of t he Α T r igger sig n al .
Incorporated i n t he C h annel 2 P ara ph
ase Amplifier is cir-
cuitry to invert t he polarity of t
h
e C
h ann el 2 signal . Wh en
I NVER T switc h S90 is out, t h e t r ansistor p airs
in
U
80 are
b iased
as t h ey are i n U 30 an d t h ere is no trace
inversio n .
F
or
t he IN position of S90, connectio
n
s to
t h
e
bases of t he
o
u t p ut transistor pairs are reverse d to produce
an i n verted
C
hann el 2 trace . P otentiometer R 75 is ad ju
sted so t h at
t h ere is minimal do trace sh ift as
t h
e
I NVER T b utton is
ch ange d b etween t he IN an d O UT p ositions .
T h eo r y of O p e r ation-2235 Service
C H A NNEL S
W ITC H A N D VER TICA L
O U
T PU T
T he C h annel Switch
circuitry,
s
h own on Diagram 2, u ti-
lizes t he front-pa n el
VER TICA L M OD E switc h es to select
t h e crt dis p lay format . See
F igure 3-2 for α b loc k diagram of
t he circuit .
VER TICA L PRE A
MPL I F I ER S

Wh en any dis p lay mode ot
h
er t
h
an
Χ - Υ is selecte d , t he
ΧΥ line connected to S550 is at
ground potential . VER TI
T h e V ertical P ream p lifier, sh own on Diagram
2, u tilizes

CA L M OD E switc hes S545 and S550
control t h e con nec-
differential signal cu rrent from t h eP a
r
ap
h
ase
Amplifie r to

tion between t he ΧΥ line and t
h
e S and
R i np uts of U 540A
produce differential outpu t c u rre
n
t to d
r ive t he Delay L ine

to obtain t he various d is p lay formats descri b ed b
elow .
Driver . Internal trigger signals for t h e T r igger circ u itry are
pic k ed-off and chann el selectio n fo r crt dis p lay is controlled
b y t he C h a nn el Switch circuit r y .

C H A NNEL 1 DIS P LAY O NL Y .
T h
eC
H 1 positio n of S550
grounds t h e S input of U 540A w
h ile t h
e
R inp u t is h eld
HI
b y
R 539 . T h is will produce α HI and α
L
O on
t h e Q and Q
Common-base tra n sistors Q102 and
Q103 con vert differ-

outpu ts res p ectively, and t he C h annel
1 P reamplifier signal
ential current from t h eP ara ph ase Am p lifier
i n
to
level-s h ifte d will drive t he Delay L i ne Drive r as descri bed
in t h e " V ertical
voltages t h at drive t he b ases of t he in p ut transisto
r s of

P ream p lifier" section . T h e C han
n
el
2 P
ream
p lifier will be
U 130 a nd t he Inter n al Trigger circ u it
r y . E mitter cu rre n t for

disabled .
t he in pu t t r ansistors is sup p lied by
Q114
and Q115,
and t he
base b ias is ad j uste d b y R 111 . T he collector current of
eac h
in p ut transistor of U 130 serves as
emitter c u rre n t for two

CH A NNEL 2 DIS PLAY O NL Y . T he C H
2 p osition of S550
d ifferential ou tput transistor p airs . One of t he collectors of

h olds t he R input of U 540A L O t h ro ug
h
C
R
538
a nd t he
eac h out p ut p air is grounded a nd t he ot h er provi des output

S in p ut is h eld HI by R 538 . T h e outpu ts
will
t
h
en be Q
L O
drive to t h e Delay L ine Driver . T h e b ase voltages of
t he

and ?i HI to ena b le t he C h annel 2P
reamplifier sig n al to drive
transistors wit h grounded collecto r s are
h
eld at
groun d ρο -

t he Delay L ine Driver w h ile t he C ha
nn
el
1 P
ream
p lifier is
tential b y R 136 . T he b ase voltages of t
h
e ot
h
er
transistors

disa b led .
are controlled by t he C h annel
Switch
an
d Trigge r V iew
circuitry .
To dis p lay t he ADD, A L T, or C H O P formats, S550
m u st
b e i n t he BOTH p osition to groun d t
h
e
Α ,
C,
an d F pins of
Wh en C h annel 1 is selected to d rive t
h
e Delay
L ine Driv-

S545 .
er, t h e Q output of U 540A is HI . T he t
r
ansistors
wit h t he
ungrounded collectors will t h en be
forwar
d -
b iase d and t he
C han nel 1 signal will b e conducted t hr oug h to t he Delay L
i n
e

ADD DIS PL AY . In t h e ADD p osition of S545, b ot
h
t
h
e S
Driver . If C h annel 1 is not selected, t hen t he Q ou t p ut of

and R inputs of U 540A are h el d L O by C R 534 a
n
d C
R
537
.
U 540A is L O . T he transistors wit h t he un grounded
collec-

T h e Q and Q out p uts are t hen b ot h HI a
n
d
signal cu rre n ts
to r s are t hen r everse- b iased and t he output
signals will be

from t h eC h annel 1 an d C h annel 2P ream
p lifiers
ad
d toget h
con d u cted to groun d by t h e ot he r tra n sistor
p
ai
r . T he gai n of

er to drive t he Delay L i n e Driver .
t h eP ream p lifier is set by a dju
sting R 145 to d etermine h ow
muc h signal current will b e shun ted between t
h
e two
diffe r -
ential o u t p uts .

C H O P DIS PL AY . In t he C H O P p osition, t
h
e C
h
op
Enab le
li ne is h el dL O k ee p i ng t h e Q o u t p ut of U
540 B Hl . T h is en-
ables m u ltivi b rator U 537D to r u
n
at α
fre
qu
ency t h at is de
Wh e n TR IG V I EW pus h bu tto
n
S200 is p
ressed in,

termine d b y R 544, R 545, an d C545 .
T h
e out
pu t of U 537C,
-8 .6 V is applie d to
R
138and
R 188 to tur n off t h e transis-

t he i n verted out p ut of t h e multivibrator, is used to
d rive
tors in U 130 and U 180 wit h u n groun ded collectors .
B
ot
h t he

U 537A and U 537 B .

Tektronix 2235 Specifications

General

Brand	Tektronix
Model	2235
Category	Test Equipment
Language	English