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Texas Instruments Jacinto7 J721E User Manual

Texas Instruments Jacinto7 J721E
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SPRUIS4A–December 2019–Revised May 2020
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Copyright © 2019–2020, Texas Instruments Incorporated
Jacinto7 J721E/DRA829/TDA4VM Evaluation Module (EVM)
User's Guide
SPRUIS4A–December 2019–Revised May 2020
Jacinto7 J721E/DRA829/TDA4VM Evaluation Module
(EVM)
This technical user's guide describes the hardware architecture and configuration options of the
J721E/DRA929/TDA4VM EVM.
Contents
1 Introduction ................................................................................................................... 5
1.1 Key Features ........................................................................................................ 5
1.2 Thermal Compliance ............................................................................................... 6
1.3 REACH Compliance................................................................................................ 7
2 J721E EVM Overview....................................................................................................... 7
2.1 J721E EVM Board Identification.................................................................................. 9
2.2 J721E SOM Component Identification ......................................................................... 10
2.3 Jacinto7 Common Processor Components Identification .................................................... 11
2.4 Quad Ethernet Components Identification ..................................................................... 12
3 EVM User Setup/Configuration........................................................................................... 13
3.1 Power Requirements.............................................................................................. 13
3.2 Power ON Switch and Power LEDs ............................................................................ 14
3.3 EVM Reset/Interrupt Push Buttons ............................................................................. 18
3.4 EVM DIP Switches ................................................................................................ 19
3.5 EVM UART/COM Port Mapping................................................................................. 23
3.6 JTAG Emulation ................................................................................................... 24
4 J721E EVM Hardware Architecture...................................................................................... 27
4.1 J721E EVM Hardware Top level Diagram ..................................................................... 27
4.2 J721E EVM Interface Mapping.................................................................................. 29
4.3 I2C Address Mapping............................................................................................. 30
4.4 GPIO Mapping..................................................................................................... 31
4.5 Power Supply ...................................................................................................... 32
4.6 Reset ............................................................................................................... 38
4.7 Clock ............................................................................................................... 40
4.8 Memory interfaces................................................................................................. 43
4.9 MCU Ethernet Interface .......................................................................................... 49
4.10 QSGMII Ethernet Interface....................................................................................... 51
4.11 PCIe Interface ..................................................................................................... 53
4.12 USB Interface...................................................................................................... 59
4.13 CAN Interface...................................................................................................... 62
4.14 FPD Interface (Audio Deserializer).............................................................................. 65
4.15 FPD Panel Interface (DSI Video Serializer) ................................................................... 66
4.16 Display Serial Interface (DSI) FPC.............................................................................. 67
4.17 Audio Interface .................................................................................................... 67
4.18 Display Port Interface ............................................................................................ 69
4.19 MLB Interface ..................................................................................................... 69
4.20 I3C Interface ...................................................................................................... 71
4.21 ADC Interface ..................................................................................................... 71
4.22 RTC Interface ..................................................................................................... 72
4.23 Apple Authentication Header .................................................................................... 73
4.24 EVM Expansion Connectors..................................................................................... 74

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Texas Instruments Jacinto7 J721E Specifications

General IconGeneral
BrandTexas Instruments
ModelJacinto7 J721E
CategoryMotherboard
LanguageEnglish

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