ZC706 Evaluation Board User Guide www.xilinx.com 20
UG954 (v1.5) September 10, 2015
Feature Descriptions
B4 PL_DDR3_D26 SSTL15 67 DQ26
B5 PL_DDR3_D27 SSTL15 69 DQ27
A3 PL_DDR3_D28 SSTL15 56 DQ28
B1 PL_DDR3_D29 SSTL15 58 DQ29
C1 PL_DDR3_D30 SSTL15 68 DQ30
C4 PL_DDR3_D31 SSTL15 70 DQ31
K10 PL_DDR3_D32 SSTL15 129 DQ32
L9 PL_DDR3_D33 SSTL15 131 DQ33
K12 PL_DDR3_D34 SSTL15 141 DQ34
J9 PL_DDR3_D35 SSTL15 143 DQ35
K11 PL_DDR3_D36 SSTL15 130 DQ36
L10 PL_DDR3_D37 SSTL15 132 DQ37
J10 PL_DDR3_D38 SSTL15 140 DQ38
L7 PL_DDR3_D39 SSTL15 142 DQ39
F14 PL_DDR3_D40 SSTL15 147 DQ40
F15 PL_DDR3_D41 SSTL15 149 DQ41
F13 PL_DDR3_D42 SSTL15 157 DQ42
G16 PL_DDR3_D43 SSTL15 159 DQ43
G15 PL_DDR3_D44 SSTL15 146 DQ44
E12 PL_DDR3_D45 SSTL15 148 DQ45
D13 PL_DDR3_D46 SSTL15 158 DQ46
E13 PL_DDR3_D47 SSTL15 160 DQ47
D15 PL_DDR3_D48 SSTL15 163 DQ48
E15 PL_DDR3_D49 SSTL15 165 DQ49
D16 PL_DDR3_D50 SSTL15 175 DQ50
E16 PL_DDR3_D51 SSTL15 177 DQ51
C17 PL_DDR3_D52 SSTL15 164 DQ52
B16 PL_DDR3_D53 SSTL15 166 DQ53
D14 PL_DDR3_D54 SSTL15 174 DQ54
B17 PL_DDR3_D55 SSTL15 176 DQ55
B12 PL_DDR3_D56 SSTL15 181 DQ56
C12 PL_DDR3_D57 SSTL15 183 DQ57
A12 PL_DDR3_D58 SSTL15 191 DQ58
A14 PL_DDR3_D59 SSTL15 193 DQ59
A13 PL_DDR3_D60 SSTL15 180 DQ60
Table 1-4: DDR3 SODIMM Socket J1 Connections to the XC7Z045 AP SoC (Cont ’d)
XC7Z045 (U1)
Pin
Net Name I/O Standard
DDR3 SODIMM Memory J1
Pin Number Pin Name