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Xilinx ZC706 User Manual
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ZC7
06 Evalua
tion Board U
ser Guide
www
.xilinx.c
om
61
UG954 (v1.5) September 10, 2015
Fea
t
ure De
scriptions
Figure
1-28
shows the user GPIO male pin header cir
cuits.
X-Ref T
arget - Figure 1-28
Figure 1-28:
U
ser GPIO
Headers
PMOD1_0_LS
PMOD1_1_LS
PMOD1_2_LS
PMOD1_3_LS
PMOD1_4_LS
PMOD1_5_LS
PMOD1_6_LS
PMOD1_7_LS
PMOD1_0
PMOD1_1
PMOD1_2
PMOD1_3
PMOD1_4
PMOD1_5
PMOD1_6
PMOD1_7
HDR_2X6
VCC3V3
VCCA
A1
A2
A3
A4
A5
A6
A7
A8
OE
VCCB
B1
B2
B3
B4
B5
B6
B7
B8
GND
19
20
18
17
16
15
14
13
12
11
2
4
6
8
10
12
1
3
5
7
9
11
PMOD1_4
PMOD1_5
PMOD1_6
PMOD1_7
PMOD1_0
PMOD1_1
PMOD1_2
PMOD1_3
2
1
3
4
5
6
7
8
9
10
TSSOP_20
TCA6416APWR
U40
U16
GND
GND
UG954_c1_28_031715
R310
DNP
DNP
DNP
R330
0
1/10W
5%
R65
4.7
1/10W
5%
1
2
1
2
1
2
TXS0108E
C105
0.1UF
10V
X5R
C104
0.1UF
10V
X5R
J58
1
2
GND
1
2
GND
GND
PORT_EXP
ANDER_DDR3_SDA
PORT_EXP
ANDER_DDR3_SCL
NC
IIC_PMOD_0
IIC_PMOD_1
IIC_PMOD_2
IIC_PMOD_3
IIC_PMOD_4
IIC_PMOD_5
IIC_PMOD_6
IIC_PMOD_7
FMC_V
ADJ_ON_R_B
FMC_LPC_PRSNT_M2C_B
FMC_HPC_PRSNT_M2C_B
FMC_HPC_PG_M2C
XADC_MUX_ADDR0
XADC_MUX_ADDR1
XADC_MUX_ADDR2
PL_PWR_ON_R
HDR_2X6
VCC3V3_PS
VCCP
VCCI
SD
A
SCL
ADDR
RESET_B
INT_B
GND
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
P12
P13
P14
P15
P16
P17
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
2
4
6
8
10
12
1
3
5
7
9
11
IIC_PMOD_4
IIC_PMOD_5
IIC_PMOD_6
IIC_PMOD_7
IIC_PMOD_0
IIC_PMOD_1
IIC_PMOD_2
IICPMOD_3
24
2
23
22
21
3
1
12
VCC3V3_PS
VCC3V3_PS
TCA6416APWR
C97
0.1UF
10V
X5R
C96
0.1UF
10V
X5R
J57
1
2
GND
1
2
GND
GND
GND
V
ADJ
VCC3V3
S
e
n
d
F
e
e
d
b
a
c
k
60
62
Table of Contents
Default Chapter
2
Revision History
2
Table of Contents
4
Chapter 1: ZC706 Evaluation Board Features
7
Overview
7
ZC706 Evaluation Board Features
7
Block Diagram
10
Board Layout
10
Feature Descriptions
14
Zynq-7000 XC7Z045 AP Soc
14
Device Configuration
15
Encryption Key Backup Circuit
16
I/O Voltage Rails
17
DDR3 SODIMM Memory (PL)
18
DDR3 Component Memory (PS)
22
Quad-SPI Flash Memory
25
USB 2.0 ULPI Transceiver
27
SD Card Interface
29
Programmable Logic JTAG Programming Options
31
Programmable Logic JTAG Select Switch
31
FMC Connector JTAG Bypass
33
Clock Generation
33
System Clock
34
Programmable User Clock
35
User SMA Clock Source
36
Processing System Clock Source
37
GTX SMA Clock (SMA_MGT_REFCLK_P and SMA_MGT_REFCLK_N)
37
Jitter Attenuated Clock
38
GTX Transceivers
39
PCI Express Endpoint Connectivity
44
SFP/SFP+ Module Connector
46
10/100/1000 Mb/S Tri-Speed Ethernet PHY (PL)
47
Ethernet PHY Clock Source
48
USB-To-UART Bridge
49
HDMI Video Output
50
I2C Bus
53
Real Time Clock (RTC)
55
Status and User Leds
56
Ethernet PHY User Leds
57
User I/O
57
User Leds
58
User Pushbuttons
59
GPIO DIP Switch
60
User PMOD GPIO Headers
60
Switches
62
Power On/Off Slide Switch
62
Program_B Pushbutton
63
PS Power-On and System Reset Pushbuttons
64
FPGA Mezzanine (FMC) Card Interface
65
HPC Connector J37
65
LPC Connector J5
69
ZC706 Board Power System
72
UCD90120A Description
72
LMZ31500 and LMZ31700 Family Regulator Description
72
XADC Power System Measurement
75
Power Management
77
VADJ Voltage Control
79
AP Soc Programmable Logic (PL) Voltage Control
80
Monitoring Voltage and Current
80
Cooling Fan
82
XADC Analog-To-Digital Converter
83
Appendix A: Default Switch and Jumper Settings
86
Switches
86
Jumpers
87
Appendix B: VITA 57.1 FMC Connector Pinouts
90
Appendix C:master Constraints File Listing
92
ZC706 Evaluation Board XDC Listing
92
Appendix D: Board Setup
108
Installing the ZC706 Board in a PC Chassis
108
Appendix E: Board Specifications
110
Dimensions
110
Environmental
110
Temperature
110
Humidity
110
Operating Voltage
110
Appendix F: Additional Resources
111
Xilinx Resources
111
Solution Centers
111
References
111
Appendix G: Regulatory and Compliance Information
114
Overview
114
Declaration of Conformity
114
Directives
114
Electromagnetic Compatibility
115
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Xilinx ZC706 Specifications
General
Brand
Xilinx
Model
ZC706
Category
Motherboard
Language
English
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