Xilinx ZC706 User Manual

ZC706 Evaluation Board User Guide www.xilinx.com 76
UG954 (v1.5) September 10, 2015
Feature Descriptions
Figure 1-34 shows the XADC external MUX block diagram.
See Table 1-35 which lists the ZC706 XADC power system voltage and current measurement
details for the external MUX U6.
X-Ref Target - Figure 1-34
Figure 1-34: XADC External MUX Block Diagram
Notes:
1. _XADC_P/N = Remote Voltage Sense
2. _XADC_CS_P/N = Current Sense From OP Amp
UG954_c1_34_041113
U1
U6
3.3 Scaled to 0.825V
ADG707BRU
Bank 35
ADIP L13
DA
DB
10PF
A0
A1
A2
3.01K
1.00K
GND
49.9
49.9
A[2:0]
P14 17
P15 18
P16 19
S1A/B
S2A/B
S3A/B
S4A/B
S5A/B
S6A/B
S7A/B
S8A/B
VCC3V3_FPGA_SENSE_P
VCC3V3_FPGA_XADC_P
VCC3V3_FPGA_SENSE_N
VADJ 2.5V Scaled to 0.625V
3.01K
1.00K
GND
VCC3V3_FPGA_SENSE_P
VCC3V3_FPGA_XADC_P
VCC3V3_FPGA_SENSE_N
Scaled to 0.75V
3.01K
1.00K
GND
VCC3V3_FPGA_SENSE_P
VCC3V3_FPGA_XADC_P
VCC3V3_FPGA_SENSE_N
VCCINT_XADC_CS_P/N
VCCAUX_XADC_CS_P/N
VCC1V5_PL_XADC_P/N
VCC1V5_PL_XADC_CS_P/N
VADJ_FPGA_XADC_P/N
VADJ_FPGA_XADC_CS_P/N
VCC3V3_PL_XADC_P/N
VCC3V3_PL_XADC_CS_P/N
AD1N K13
U16
XC7Z045
TCA6416APWR
12C Port
Expander
Table 1-35: XADC Measurements through MUX U6
Meas.
Type
Rail Name
Current
Range
Isense Op Amp
Schematic Net Name
8-to-1 MUX U6
MUX A[2:0]
Reference
Designator
Gain Vo Range
Pin
Num
Pin
Name
V VCCINT NA NA NA NA XADC INTERNAL NA NA NA
I VCCINT CS 0A-8A U69 20 0V-0.8V VCCINT_XADC_CS_P 19 S1A 000
VCCINT_XADC_CS_N 11 S1B
V VCCAUX NA NA NA NA XADC INTERNAL NA NA NA
I VCCAUX CS 0A-4A U68 50 0V-1V VCCAUX_XADC_CS_P 20 S2A 001
VCCAUX_XADC_CS_N 10 S2B
V VCC1V5_PL NA VCC1V5_PL REMOTE SENSE DIVIDED
TO DELIVER 0.75V ON
VCC1V5_PL_XADC_P
VCC1V5_PL_XADC_P 21 S3A 010
VCC1V5_PL_SENSE_N 9 S3B
I VCC1V5_PL CS 0A-2A U67 100 0V-1V VCC1V5_PL_XADC_CS_P 22 S4A 011
VCC1V5_PL_XADC_CS_N 8 S4B
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Xilinx ZC706 Specifications

General

Brand	Xilinx
Model	ZC706
Category	Motherboard
Language	English