2-12 MAC 1200 resting ECG analysis system Revision D
2012250-095
Functional Description: PCB Control CS_CI
Memory
The complete memory of the MAC 1200 resting ECG analysis system is located
on the PCB Control CS_C(I). The software of the device can be loaded through the
JTAG port during the production process, or for service purposes with the
appropriate programming software through the RS-232 interface.
Program Memory
Type: Flash, +3.3 V supply
Organization: 2Mbit X 16, 4Mbyte
Wait states: 1 wait state
DRAM
Type: SDRAM, +3.3 V supply
Organization: 4Mbit X 16, 8Mbyte
Wait States: 0 wait state
Patient ECG Memory
Type: Buffered SRAM, +3.3 V supply
Organization: 512Kwords X 16 bits
Wait States: 1 wait state
Configuration Memory
The configuration memory is part of the program memory Flash. With special
hardware and software protection facilities, write access to the Flash is only possible
in the defined configuration memory of the Flash. Thus an external configuration
memory like an EEPROM is not required.
LCD Graphics Display Interface
The LCD controller is now implemented in FPGA.
Controller Interface
For the digital control signals, delivered from the MPC855T, only an output driver is
required.
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