Intel
®
Server Board S5500BC TPS Functional Architecture
Revision 1.0 Intel order number: E42249-003 21
3.1.7 Multi-Core Processor Support
The BIOS does the following:
Initializes all processor cores.
Installs all NMI handlers for all Intel
®
Xeon
®
processor 5500 series.
Leaves initialized AP in CLI/HLT loop.
Initializes stack for all APs.
BIOS Setup provides an option to selectively enable or disable multi-core processor support.
The default behavior is enabled.
3.1.8 Independent Loading Mechanism (ILM) Back Plate Design Support
The Intel
®
Server board S5500BC complies with Intel’s Independent Loading Mechanism (ILM)
processor mounting and Unified Retention System (URS) heat sink retention solution. The ILM
design allows a bottoms-up assembly of the components to the board. The unified back plate
for dual processor server products consists of a flat steel back plate with threaded studs for ILM
attachment, and internally threaded nuts for attaching the heat sink. The threaded studs have a
knurled feature that attaches the back plate to the motherboard when assembled.
The following diagram illustrates the URS and the Unified Backplate Assembly. The URS is
designed to extend air-cooling capability through the use of larger heat sinks with minimal
airflow blockage and bypass. URS retention transfers load to the baseboard via the Unified
Backplate Assembly. The URS spring, captive in the heat sink, provides the necessary
compressive load for the thermal interface material.
Note: The processor heat sink and ILM backplate shown in the following diagram is for
reference purposes only. The actual processor heat sink and ILM backplate solutions
compatible with this generation of server boards may have a different design.
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