EN 106DVDR615/69 7.
Circuit Diagrams and PWB Layouts
FEBE: FE Laconic Pre-processing
VSSA
VDDD VDDA
VSSD
L305 B3
L306 C5
L307 D3
L308 A3
L309 C6
L310 B5
L311 C5
TO OPU/EPLD/CENTAURUS
4303 B3
5300 E3
5301 E1
7300 A4
I300 C3
I301 C3
I302 C5
I303 E4
I304 D3
I305 D3
I306 C3
I307 A2
I308 B3
I310 B3
I311 B3
I312 C3
I313 E1
I314 B3
I315 C5
I316 B5
I317 B5
I318 C6
I319 C3
I320 A3
L301 D5
L303 D5
L304 C5
2301 E4
2302 E4
2303 A2
2304 B2
2305 B5
2306 E2
2307 E2
2308 D3
2309 C7
2310 B2
2311 A2
Temp Val
2312 A2
3300 B2
3301 C7
3302 D2
3303 A2
3304 C6
3305 C6
3306 C6
3308 B2
3309 B2
3315 B3
3316 C2
12345678
B
C
D
E
A
B
C
D
E
U1 B5
1302 B2
2300 E4
OPTION
OPTION
OPTION
NOITPO
OPTION
9
123456789
3309
1K8
10K
3308
I315
I317
I302
L303
I301
L311
L308
L307
L305
I316
100n2308
4033
K01
3302
1R
K01
5033
3301
10K
I320
I312
I307
M1
10K
3316
22n
2305
0033
2132
p51
2310
100n
L310
91
82
93
3
15
VTHR
34
WSB
04
2
14
VDEL
16
VOPUREF
13
VREFH
17
VREFIN
12
VREFL
01
32
SDIO
31
SEN
20
TEST1A
7
TEST1D
23
TEST2A
42
TEST2D
9
81
92
5
OSCO
36
OSTR
37
RESET_
38
RW_
44
SCL
33
SCLK
43
SDA
25
ENR1
24
ENR2
27
HILO
22
IACPR
21
IAPCW
35
IRQ_
11
LASP
6
OSCI
1
AEZ
8
AMES
41
BANK
30
BUSY
4
CLKOUT
26
DVDCD
7300
TZA1042
L301
I300
L309
53005301
4303
I305
1032
n001
I311
I313
I318
U1
I319
2309
100n
6033
K01
7032
n001
I306
6032
n001
I303
2304
39M61
2303
15p
15p
I308
2031
F61-XC
n001
2032
n001
0032
I310
L304
1n0
2311
L306
I304
I314
33R
3315
150R
3303
3V3A3V3D
{WSB,RW-Del,OSC_IN,PORN,SCL,SDA,SCLK,SDIO,SEN,HIGH-GAIN,CD-MODE,ALFA,LASP,Vdel,Vthr,VREF,IOthr,CD-MODE,HIGH-GAIN,IRQN,OSTR,SDA,SCL,IoDel}
VREF
VREF
SDA
SDIO
SEN
Vdel
Vthr
3V3A
WSB
3V3DA3V3 3V3A D3V3
D3V3
3V3D
3V3D
ALFA
OSC_IN
CD-MODE
HIGH-GAIN
IRQN
IoDel
IOthr
LASP
OSTR
RW-Del
PORN
SCL
SCLK
TR20036_001.eps
14062004
I308 XTAL 1302
I320 CLKOUT, IC7300 pin 4
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