Quectel LPWA Series User Manual

LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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2.5. Pin Description
The following table shows the DC characteristics and pin descriptions.
Table 5: I/O Parameters Definition
1. ADC input voltage must not exceed 1.8 V.
2. Keep all RESERVED pins and unused pins unconnected.
3. GND pins should be connected to ground in the design.
4. PCM and I2C interfaces are used for VoLTE* only.
5. Only BG951A-GL supports GNSS_BOOT (pin 75), GNSS_NRST (pin 76), GNSS_EN (pin 97),
SFNIND_1PPS (pin 98).
6. For BG950A-GL, pin 27 and pin 28 can only be used as CLI UART interface. When pin 27 and pin
28 are used as CLI_TXD and CLI_RXD, the two pins should be connected to pin 95 and pin 94
respectively inside the module. For BG951A-GL, pin 27 and pin 28 can only be used as GNSS
UART interface.
Type
Description
AI
Analog Input
AIO
Analog Input/Output
DI
Digital Input
DO
Digital Output
DIO
Digital Input/Output
OD
Open Drain
PI
Power Input
PO
Power Output
NOTE

Quectel LPWA Series Specifications

General

Brand	Quectel
Model	LPWA Series
Category	GSM/GPRS Modules
Language	English