Quectel LPWA Series User Manual

LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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4.4. PCM and I2C Interfaces*
The module provides one Pulse Code Modulation (PCM) digital interface and one I2C interface for
VoLTE* only. The following table shows the pin definition of the two interfaces which can be applied on
audio codec design.
Table 18: Pin Definition of PCM Interface
Table 19: Pin Definition of I2C Interface
The reference design is illustrated as follows:
4. Please note that the module’s CTS is connected to the host’s CTS, and the module’s RTS is
connected to the host’s RTS.
Pin Name
Pin No.
I/O
Description
Comment
PCM_CLK
4
DO
PCM clock
1.8 V power domain.
If these pins are unused, keep
them open.
PCM_SYNC
5
DO
PCM data frame sync
PCM_DIN
6
DI
PCM data input
PCM_DOUT
7
DO
PCM data output
Pin Name
Pin No.
I/O
Description
Comment
I2C_SCL
40
OD
I2C serial clock
(for external codec)
Require external pull-up to 1.8 V only.
If these pins are unused, keep them
open.
I2C_SDA
41
OD
I2C serial data
(for external codec)

Quectel LPWA Series Specifications

General

Brand	Quectel
Model	LPWA Series
Category	GSM/GPRS Modules
Language	English