Quectel LPWA Series User Manual

LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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1. When the module starts up normally, in order to ensure full-function mode, the minimum power
supply voltage should be higher than 2.2 V. For every VBAT transition/re-insertion from 0 V, VBAT
slew rate < 25 mV/μs. In order to ensure that the module can start normally, pull down PWRKEY to
turn on the module after VBAT remains stable for 100 ms.
2. After entering PSM or power off mode, it is prohibited to provide any external voltage to the
module's I/O ports that are not defined as a wake-up source (PON_TRIG pin).
3. PCM and I2C interfaces are for VoLTE* only.
4. Keep all RESERVED pins and unused pins unconnected.
2.6. EVB
To help customers to develop applications with the module conveniently, Quectel supplies an
evaluation board (EVB), USB to RS-232 converter cables, USB data cables, earphone, antennas, and
other peripherals to control or to test the module. For more details, see document [1].
V
IH
max = 2.0 V
pin open.
GNSS_EN
97
DI
Enable internal GNSS
chip
V
IL
min = -0.2 V
V
IL
max = 0.54 V
V
IH
min = 1.26 V
V
IH
max = 2.0 V
1.8 V power
domain.
If unused, keep this
pin open.
SFNIND_1PPS
98
DO
One pulse per second
V
OL
max = 0.36 V
V
OH
min = 1.44 V
Synchronized at
rising edge, the
pulse width is
100 ms. If unused,
please keep this pin
open.
RESERVED Pins
Pin Name
Pin No.
Comment
RESERVED
11–14, 16, 51–53, 56, 57, 63, 75, 76, 77, 78, 92–93, 97–99
Keep these pins
open.
NOTE

Quectel LPWA Series Specifications

General

Brand	Quectel
Model	LPWA Series
Category	GSM/GPRS Modules
Language	English