Parameters/address space
5.3 Address space of the pulse generators
CPU 1512C-1 PN (6ES7512-1CK00-0AB0)
108 Manual, 09/2016, A5E35306440-AB
Address space of the high-speed counters
Table 5- 1 Size of the input and output addresses of the high-speed counters
Size per high-speed counter (6x)
You can find a description of the control interface in the section Assignment of the control
interface of the high-speed counters (Page 40). You can find a description of the feedback
interface in the section Assignment of the feedback interface of the high-speed counters
(Page 42).
Table 5- 2 Size of the input and output addresses in operating mode "Position input for Motion Control"
Size per high-speed counter (6x)
Address space of the pulse generators
Address space of the pulse generators in the PWM, frequency output and PTO modes
Feedback interface
(inputs)
Control interface
(outputs)
Frequency output 4 bytes 12 bytes
* In "Deactivated" mode, the control interface is not evaluated and the feedback interface is set to 0 value