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Siemens CPU 1518-4 PN/DP ODK User Manual

Siemens CPU 1518-4 PN/DP ODK
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Technology functions
3.1 High-speed counters
CPU 1512C-1 PN (6ES7512-1CK00-0AB0)
Manual, 09/2016, A5E35306440-AB
39
3.1.1.4
Additional functions
Synchronization
You can configure an external reference signal edge to load the counter with the specified
start value. The following external signals can trigger a synchronization:
Rising or falling edge of a digital input
Rising edge of signal N at the encoder input
Rising edge of signal N at the encoder input depending on the level of the assigned digital
input
Comparison values
The integrated counter supports 2 comparison values and digital output HSC DQ1. If the
counter or measured value meets the set comparison condition, HSC DQ1 can be set in
order to trigger direct control operations in the process.
Both comparison values can be set in the parameters and can be changed during runtime by
the user program.
Hardware interrupts
If you have enabled a hardware interrupt in the hardware configuration, the counter can
trigger a hardware interrupt in the CPU when a comparison event occurs, if there is overflow
or underflow, at a zero crossing of the counter, and/or at a change of count direction
(direction reversal). You can specify which events are to trigger a hardware interrupt during
operation in the hardware configuration.
Diagnostics interrupts
If you have enabled a diagnostics interrupt in the hardware configuration, the counter can
trigger a diagnostics interrupt if the supply voltage is missing, if there is an incorrect A/B
count signal or lost hardware interrupt.

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Siemens CPU 1518-4 PN/DP ODK Specifications

General IconGeneral
BrandSiemens
ModelCPU 1518-4 PN/DP ODK
CategoryController
LanguageEnglish

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