DocID14024 Rev 4 7/39
UM0470 Communication layer
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2 Communication layer
The SWIM is a single wire interface based on asynchronous, high sink (8 mA), open-drain,
bidirectional communication. While the CPU is running, the SWIM allows a non-intrusive
read/write accesses to be performed on-the-fly to the RAM and peripheral registers, for
debug purposes.
In addition, while the CPU is stalled, the SWIM allows read/write accesses to be performed
to any other part of the MCU’s memory space (data EEPROM and program memory).
The CPU registers (A, X, Y, CC, SP) can also be accessed. These registers are mapped in
the memory and can be accessed in the same way as any other memory addresses. It is
important to note that:
• Register, peripherals and memory can be accessed only when the SWIM_DM bit is set.
• When the system is in HALT, WFI or readout protection mode, the NO_ACCESS flag in
the SWIM_CSR register is set. In this case, it is forbidden to perform any accesses
because parts of the device may not be clocked and a read access could return
garbage or a write access might not succeed.
The SWIM can perform a MCU device software reset. The SWIM pin can also be used by
the MCU target application as a standard I/O port with some restrictions if the user also want
to use it for debug. The safest way is to provide a strap option on the application PCB.
Figure 2. SWIM pin external connections
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