TM 11-6625-2735-14-1
The amplifier consists of two emitter-coupled push-
pull amplifier stages. The emitter source voltage for Q662
and Q672 is switched on and off by the TRIG VIEW
pushbutton. With the TRIG VIEW bushbutton not pushed,
the emitters of Q662 and Q672 are returned to ground
through R665. This reverse-biases the base-emitter junc-
tions of the transistors, preventing any loading of the A
Trigger Generator circuit. When the TRIG VIEW pushbut-
ton is pushed, the emitters are now returned to +15 volts
through R663 and R679. This forward biases Q662 and
Q672 to allow signal amplification. Trigger View Centering
adjustment R673 adjusts for correct DC balance in the
circuit.
Normally, the output of the Vertical Channel Switching
circuit is applied to the input of the Delay Line. When the
TRIG VIEW pushbutton is pushed, the signal from the
Vertical Channel Switching circuit is removed and the
output from the Trigger View Amplifier is applied in its
place.
B TRIGGER GENERATOR
General
The B Trigger Generator circuit produces the trigger
pulse used to start the Sweep Generator circuit that
provides the B portion of the CRT display. The B Trigger
Generator circuit is virtually the same as the A Trigger
Generator circuit and only the differences between the
two are discribed here. A schematic of this circuit is shown
on Diagram 6 at the rear of this manual.
Trigger Source
The B Trigger Generator circuit has no LINE or EXT
10 positions on its Trigger SOURCE switch. If the
Generator is to be triggered from a line voltage signal or
the external trigger signal is to be attenuated, it must be
accomplished in some other manner. The B Trigger
SOURCE switch does have a STARTS AFTER DELAY
position, however, the A Trigger SOURCE switch does
not. This position allows the B portion of a display to start
immediately after the selected delay time without waiting
for a triggering signal.
SWEEP AND Z-AXIS LOGIC
General
The Sweep and Z Axis Logic Circuit derives the logic
levels necessary to control the sequence of events
associated with sweep generation and CRT unblinking.
The +A and +B GATE signals are also generated in this
circuit. Positive logic terminologies and symbologies are
used in the following explanation of circuit operation. Fig.
3-6 shows a detailed block diagram of the Sweep and Z-
Axis Logic circuits. A schematic of this circuit is shown on
Diagram 7 at the rear of this manual.
3-12
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