Tektronix DPO5000 Series Technical Reference

Setup-hold time violation trigger,
minimum clock pulse widths,
typical
≥4 GHz models
Minimum time from active clock edge to
inactive edge
Minimum time from inactive clock edge to
active edge
Hold times ≥ 0: Hold time + 550 ps 500 ps
Hold times <0: Hold time + 1.6 ns 500 ps
<4 GHz models
Minimum time from active clock edge to
inactive edge
Minimum time from inactive clock edge to
active edge
Hold times ≥ 0: Hold time + 500 ps 500 ps
Hold times <0: Hold time + 1.5 ns
Pattern and state trigger, minimum
timing requirements, typical,
≥4 GHz models
The transition trigger event occurs at the end of the transition. The logic condition must be valid at
the moment the transition event occurs minus the setup time plus the hold time.
Minimum
pulse width
Minimum
rearm time
Setup time Hold time
Pattern type 150 ps 200 ps N.A. N.A.
Time qualified pattern type 150 ps 300 ps N.A. N.A.
State type 1.7 GHz N.A. 25 ps 100 ps
Period trigger sensitivity, typical
≥4 GHz models 1.5 divisions (at input connector)
<4 GHz models 1.0 division (at input connector)
B trigger after events minimum
timing requirements, typical
≥4 GHz models
Minimum pulse width Maximum counting frequency Minimum time between
channels
140 ps 3.5 GHz 1 ns
<4 GHz models
Minimum pulse width Maximum counting frequency Minimum time between
channels
200 ps 1 ns
B trigger after events, event
counter range
≥4 GHz models 1 to 2,000,000,000
<4 GHz models 1 to 10,000,000
B trigger after time, time delay
range
≥4 GHz models 3.2 ns to 3 Ms
<4 GHz models 5 ns to 250 s
Specifications (MSO70000C/DX, DPO70000C/DX, and DPO7000C series) Trigger specifications (cont.)
64 MSO70000C/DX, DPO70000C/DX, DPO7000C, MSO5000/B, DPO5000/B Series

Tektronix DPO5000 Series Specifications

General

Brand	Tektronix
Model	DPO5000 Series
Category	Test Equipment
Language	English