EasyManuals Logo
Home>Xilinx>Motherboard>ML505

Xilinx ML505 User Manual

Xilinx ML505
60 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #42 background imageLoading...
Page #42 background image
42 www.xilinx.com ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
Chapter 1: ML505/ML506/ML507 Evaluation Platform
R
38. Rotary Encoder
The board provides connectivity to a rotary encoder (Panasonic EVQWK4001) with 15
detents, pushbutton, and two phase output signals for direction of rotation interpretation.
One complete revolution of the rotary wheel produces 15 pulses that are output on nets
FPGA_ROTARY_INCA and FPGA_ROTARY_INCB. Pushing the rotary wheel laterally
causes a momentary switch closure on the FPGA_ROTARY_PUSH output. The rotary
encoder circuit is wired so that all switch closures result in an active-High output.
Table 1-23 shows the connections for the rotary encoder.
39. Differential GTP/GTX Input and Output with SMA Connectors
Four SMA connectors (Rosenberger 32K153-400E3) provide a convenient and easily
accessible method of interfacing to GTP/GTX transceivers s for general-purpose
connectivity. The SMAs are designed and laid out to provide high-quality GTP/GTX
connections for speeds up to 3.125 Gb/s. Although the ML50x provides access to the
GTP/GTX transceivers, the board is not intended for transceiver characterization.
The transmit pair is connected directly from the FPGA to the SMA connectors while the
receive pair is connected to the FPGA via series AC coupling capacitors. If a DC-coupled
receive-side connection is desired, these capacitors can be replaced with 0Ω 0402-size
resistors. Table 1-24 shows the GTP transceiver pairs available through the SMA
connectors.
Table 1-23: Rotary Encoder Connections
Name FPGA Pin (U1)
FPGA_ROTARY_INCA AH30
FPGA_ROTARY_INCB AG30
FPGA_ROTARY_PUSH AH29
Table 1-24: GTP Pairs through SMA Connectors
Pin Name FPGA Pin Connector ML505/ML506 ML507
SMA_RX_P K1 J43 GTP1 of
GTP_X0Y4
receive pair
GTX1 of
GTX_X0Y5
receive pair
SMA_RX_N J1 J42
SMA_TX_P L2 J45 GTP1 of
GTP_X0Y4
receive pair
GTX1 of
GTX_X0Y5
receive pair
SMA_TX_N K2 J44
Downloaded from Elcodis.com electronic components distributor

Table of Contents

Other manuals for Xilinx ML505

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Xilinx ML505 and is the answer not in the manual?

Xilinx ML505 Specifications

General IconGeneral
BrandXilinx
ModelML505
CategoryMotherboard
LanguageEnglish

Related product manuals