Xilinx ML605 Hardware User's Guide

ML605 Hardware User Guide www.xilinx.com 21
UG534 (v1.9) February 26, 2019
Detailed Description
D12 DDR3_DQS0_P 12 DQS0_P
J12 DDR3_DQS1_N 27 DQS1_N
H12 DDR3_DQS1_P 29 DQS1_P
A14 DDR3_DQS2_N 45 DQS2_N
A13 DDR3_DQS2_P 47 DQS2_P
H20 DDR3_DQS3_N 62 DQS3_N
H19 DDR3_DQS3_P 64 DQS3_P
C23 DDR3_DQS4_N 135 DQS4_N
B23 DDR3_DQS4_P 137 DQS4_P
A25 DDR3_DQS5_N 152 DQS5_N
B25 DDR3_DQS5_P 154 DQS5_P
G28 DDR3_DQS6_N 169 DQS6_N
H27 DDR3_DQS6_P 171 DQS6_P
D30 DDR3_DQS7_N 186 DQS7_N
C30 DDR3_DQS7_P 188 DQS7_P
F18 DDR3_ODT0 116 ODT0
E17 DDR3_ODT1 120 ODT1
E18 DDR3_RESET_B 30 RESET_B
K18 DDR3_S0_B 114 S0_B
K17 DDR3_S1_B 121 S1_B
D17 DDR3_TEMP_EVENT 198 EVENT_B
B17 DDR3_WE_B 113 WE_B
C17 DDR3_CAS_B 115 CAS_B
L19 DDR3_RAS_B 110 RAS_B
M18 DDR3_CKE0 73 CKE0
M17 DDR3_CKE1 74 CKE1
H18 DDR3_CLK0_N 103 CK0_N
G18 DDR3_CLK0_P 101 CK0_P
L16 DDR3_CLK1_N 104 CK1_N
K16 DDR3_CLK1_P 102 CK1_P
Table 1-4: DDR3 SODIMM Connections (Cont’d)
U1 FPGA Pin Schematic Net Name
J1 SODIMM
Pin Number Pin Name
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Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English