Xilinx ML605 Hardware User's Guide

ML605 Hardware User Guide www.xilinx.com 43
UG534 (v1.9) February 26, 2019
Detailed Description
13. USB Controller
The ML605 provides USB support via a Cypress CY7C67300 EZ-Host™ Programmable
Embedded USB Host and Peripheral Controller (U81). The host port is a USB Type-A
connector (J5). A USB keyboard (without an internal USB hub) will be able to connect to
this USB Host port to demonstrate functionality. The peripheral port is a USB Type Mini-B
(J20).
See the Cypress CY7C67300 Data Sheet for more information. [Ref 32]
In addition, see the USB Specifications for more information. [Ref 33]
The FPGA requires implementation of a peripheral controller in order to communicate
with the Cypress USB device. See the XPS External Peripheral Controller (EPC) Data Sheet
(DS581) for more information. [Ref 20]
Table 1-16: USB Controller Connections
U1 FPGA
Pin
Schematic Net Name
U81 USB Controller
Pin
Number
Pin Name
Y32 USB_A0_LS 52 GPIO19_A0_CS0_52
W26 USB_A1_LS 50 50_GPIO20_A1_CS1
W27 USB_CS_B_LS 49 49_GPIO21_CS_N
R33 USB_D0_LS 94 GPIO0_D0_94
R34 USB_D1_LS 93 GPIO1_D1_93
T30 USB_D2_LS 92 GPIO2_D2_92
T31 USB_D3_LS 91 GPIO3_D3_91
T29 USB_D4_LS 90 GPIO4_D4_90
V28 USB_D5_LS 89 GPIO5_D5_89
V27 USB_D6_LS 87 GPIO6_D6_87
U25 USB_D7_LS 86 GPIO7_D7_86
Y28 USB_D8_LS 66 GPIO8_D8_MISO_66
W32 USB_D9_LS 65 GPIO9_D9_nSSI_65
W31 USB_D10_LS 61 GPIO10_D10_SCK_61
Y29 USB_D11_LS 60 GPIO11_D11_MOSI_60
W29 USB_D12_LS 59 GPIO12_D12_59
Y34 USB_D13_LS 58 GPIO13_D13_58
Y33 USB_D14_LS 57 GPIO14_D14_57
Y31 USB_D15_LS 56 GPIO15_D15_SSI_N_56
Y27 USB_INT_LS 46 46_GPIO24_INT_IORDY_IRQ0
W25 USB_RD_B_LS 47 47_GPIO23_RD_N_IOR
T25 USB_RESET_B_LS 85 RESET_N_85
V25 USB_WR_B_LS 48 48_GPIO22_WR_N_IOW
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Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English