Xilinx ML605 Hardware User's Guide

UG534 (v1.9) February 26, 2019 www.xilinx.com ML605 Hardware User Guide
10/12/10 1.4 Updated description of Fusion Digital Power Software in Onboard Power Regulation.
02/15/11 1.5 Revised note in Table 1-6. Revised oscillator manufacturer information from Epson to
SiTime on page page 14, page 30 and page 88.
07/18/11 1.6 Corrected “jitter” to “stability” in section Oscillator (Differential). Added Table 1-32, and
table notes in Table 1-31. Revised the FPGA U1 Pins for IIC_SDA_MAIN and
IIC_SCL_MAIN in Table 1-18.
06/19/12 1.7 Added [Ref 4] link to Oscillator (Differential). Revised Oscillator Socket (Single-Ended,
2.5V). Revised Figure 1-10.
10/02/12 1.8 Updated Figure 1-2. Added Regulatory and Compliance Information.
02/26/19 1.9 Updated Appendix C, Xilinx Design Constraints, Appendix D, Regulatory and
Compliance Information, and the 2. 512 MB DDR3 Memory SODIMM section.
Date Version Revision

Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English