© National Instruments | 9-7
X Series User Manual
• AO Start Trigger (ao/StartTrigger)
• AO Sample Clock (ao/SampleClock)
• AO Sample Clock Timebase (ao/SampleClockTimebase)
• AO Pause Trigger (ao/PauseTrigger)
• Counter input signals for all counters—Source, Gate, Aux, HW_Arm, A, B, or Z
• DI Sample Clock (di/SampleClock)
• DI Start Trigger (di/StartTrigger)
• DI Pause Trigger (di/PauseTrigger)
• DI Reference Trigger (di/ReferenceTrigger)
• DO Sample Clock (do/SampleClock)
• DO Sample Clock Timebase (do/SampleClockTimebase)
Most functions allow you to configure the polarity of RTSI inputs and whether the input is edge
or level sensitive.
RTSI Filters
You can enable a programmable debouncing filter on each PFI, RTSI, or PXI_STAR signal.
Refer to the
PFI Filters section of Chapter 8, PFI, for more information.
PXI and PXI Express Clock and Trigger Signals
PXI and PXI Express clock and trigger signals are only available on PXI Express devices.
PXIe_CLK100
PXIe_CLK100 is a common low-skew 100 MHz reference clock for synchronization of multiple
modules in a PXI Express measurement or control system. The PXIe backplane is responsible
for generating PXIe_CLK100 independently to each peripheral slot in a PXI Express chassis.
For more information, refer to the PXI Express Specification at www.pxisa.org.
PXIe_SYNC100
PXIe_SYNC100 is a common low-skew 10 MHz reference clock with a 10% duty cycle for
synchronization of multiple modules in a PXI Express measurement or control system. This
signal is used to accurately synchronize modules using PXIe_CLK100 along with those using
PXI_CLK10. The PXI Express backplane is responsible for generating PXIe_SYNC100
independently to each peripheral slot in a PXI Express chassis. For more information, refer to
the PXI Express Specification at www.pxisa.org.
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