Renesas R8C series User Manual

R8C/1A Group, R8C/1B Group 16. Clock Synchronous Serial Interface
Rev.1.30 Dec 08, 2006 Page 229 of 315
REJ09B0252-0130
Figure 16.48 Example of Register Setting in Slave Transmit Mode (I
2
C bus Interface Mode)
End
Write transmit data to ICDRT register
Slave transmit mode
No
Yes
(1) Set the AAS bit to 0.
(2) Set the transmit data (except the last byte).
(3) Wait until the ICRDT register is empty.
(4) Set the transmit data of the last byte.
(5) Wait until the last byte is transmitted.
(6) Set the TEND bit to 0.
(7) Set to slave receive mode.
(8) Dummy read the ICDRR register to release the
SCL signal.
(9) Set the TDRE bit to 0.
TDRE = 1 ?
Read TDRE bit in ICSR register
Last byte ?
Write transmit data to ICDRT register
TEND = 1 ?
Read TEND bit in ICSR register
ICSR register TEND bit ← 0
ICSR register AAS bit ← 0
ICCR1 register TRS bit ← 0
ICSR register TDRE bit ← 0
No
Yes
No
Yes
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Dummy read in ICDRR register

Renesas R8C series Specifications

General

Brand	Renesas
Model	R8C series
Category	Computer Hardware
Language	English