If
CC1,
or
CC3,
or
both CC1 and CC3
are
lis
after
!,!xecution
of
MSP,
the
instruction was
aborted
but
the
push-
down
stack
limit trap was
inhibited
by
the
trap-on-space
inhibit
(SPD32), by the
trap-on-word
inhibit
(SPD48),
or
both. The
condition
code
is
set
to
reflect
the
reason for
aborting
as follows:
2 3 4 Status
of
space
and
word counts
-
0 Word
count>
O.
Word
count
=
O.
- 0 - 0
~
word
count
+ modifier
~
2
15
_1.
- Word
count
+ modifier <
0,
and
TW
= 1
or
word
count
+
modifier>
2
15
_1,
and
TW
=
1.
-
·0
Space
count>
O.
Space
count
=
O.
o - 0
~
space
count
- modifier < 2
15
_1.
-
Space
count
-
modifier
<
0,
and
TS
= 1
or
space
count
- modi
fi
er
> 2
15
-1,
and
TS
=
1.
PUSH-DOWN
INSTRUCTIONS
(PRIVILEGED)
The computer has two privi leged push-down instructions:
PUSH
STATUS
(PSS)
and
PULL
STATUS
(PLS). These two
in-
structions and a Status
Stack
Pointer Doubleword faci
litate
the
storing (pushing)
or
loading
(pulling)
of
a
particular
environment
(contents
of
16
general
registers end Program
Status Words)
into
or
out
of
a memory
stack.
STATUS
STACK
POINTER
DOUBLEWORD
The Status Stack Pointer Doubleword (SSPD)
always
resides
in
real
memory
locations
0 and 1
and
is
dedicated
for
PSS
and
PLS
instructions. The format
of
parameters
contained
within
the
Status
Stack
Pointer Doubleword
are
as follows:
Real
Memory Location
0:
Real Memory Location 1:
TOP
OF
STACK
ADDRESS
The Top
of
Stack
Address
(TSA)
is
always
a
20-bit
real
mem-
ory word address and is
never
mapped. Depending upon
programming
considerations,
the
initial
TSA
is a
specific
value
either
as
the
result
of
a
Mode
0,
WRITE
DIRECT
instruction
or
as
the
result
of
a
PSS
or
PLS
instruction,
as
described
below.
During
each
PSS
instruction,
the
memory
stack
is
accessed
28 times
and
the
TSA
is
incremented
by 1 before
each
access.
The first memory
stack
location
accessed
has a
relative
ad-
dress
equal
to
the
initial
TSA
plus 1,
...
, and
the
28th
mem-
ory
stack
location
accessed
has a
relative
address
equal
to
the
initial
TSA
plus
28..
Although
28
memory
stack
loca-
tions
are
accessed
in an
ascending
sequence,
on
Iy
20
loca-
tions (as
selected
by
the
hardware)
wi
II
contain
the
basic
processor
environment.
Eight
locations
(whose
contents
are
designated
as
"indeterminate",
in Figure 12)
are
reserved
and must
not
be used.
For
each
PLS
instruction,
access
to
the
memory
stack
is
contingent
upon
the
Word
Count
as
described
subsequently.
If
access
is
permitted,
the
memory
stack
is
accessed
28
times
and
the
TSA
is
decremented
by 1
after
each
access.
The
first memory
stack
location
accessed
by a
PLS
instruction
has a
relative
address
equal
to the
initial
TSA,
the
second
memory
stack
location
accessed
has a
relative
address
equal
to
the
initial
TSA
minus 1,
...
,
and
the
28th memory
stack
location
accessed
has a
relative
address
equal
to
the
initial
TSA
minus 27. Although 28 memory
stack
locations
are
accessed
in a
descending
sequence,
the
hardware
selects
and pulls
the
contents
of
only
20
locations
containing
valid
information, as shown in Figure 12,
and
loaded
into
the
general
registers
and
PSWs
... The
contents
of
eight
locations
designated
as
indeterminate
are
ignored.
If
the
terminal (last)
TSA
for a
PSS
or
PLS
instruction
is
not
modified
by a Mode 0
WRITE
DIRECT
instruction,
it
may be used as
the
initial
TSA
for a subsequent
PSS
or
PLS
instruction.
Each
PSS
instruction
causes
the
memory
stack
to be
increased
by 28 word
locations
and
each
PLS
instruc-
tion causes
the
memory
stack
to
be
decreased
by 28 word
locations.
The information is pushed and
pulled
on a
last-in,
first-out
basis.
Note:
The
PLS
instruction
is
contingent
upon
the
Word
Count
value,
as
described
below.
SPACE
COUNT
The
Space
Count
field
(bit positions
33-47)
of
the
Status
Stack
Pointer Doubleword is a
15-bit
counter
that
may
con-
tain
a
value
of
0 through
32,767.
Depending upon
pro-
gramming
considerations,
the
initial
Space
Count
is a
specific
value
either
as
the
result
of
executing
a
Mode
0,
WRITE
DIRECT
instruction
or
a
PLS
or
PSS
instruction.
During a
PSS
instruction,
the
Space
Count
is
decremented
by 1 for
each
word pushed
into
the
memory
stack.
If
the
Space
Count
is
decremented
to a
value
of
zero
before
a"
the
words
have
been
pushed,
the
PSS
instruction
continues
(i.
e.,
no
trapping
occurs). The
environment
is stored
into
Push-Down Instructions (Privileged)
101