(also, by a single instruction). The
current
program status
words, which
contain
the
entire
description of
the
current
user's environment and mode of
operation,
may be stored
anywhere in memory, and new program status words may be
loaded,
all
with a single instruction.
Multiple
Register Blocks. The
availability
of four blocks
of 16
general-purpose
registers improves response time by
reducing
the
need
to
store
and
load register blocks. A
distinct
block may be assigned for different functions as
needed; the program status words
automatically
select
the
applicable
register block.
User
Protection. The
slave
mode
feature
restricts
each
user
to
his own
set
of instructions while reserving
to
the
operat-
ing system
certain
"privileged"
(master mode) instructions
that
could destroy
another
user's program if used
incor-
rectly.
Also, a memory
access
- protection
feature
pre-
vents a user
from
accessi
ng
any
storage
areas
other
than
those assigned
to
him. It permits
him
to
access
certain
areas
for reading only, such as those
containing
publ ic subrou-
tines, while preventing him from
reading,
writing, or
ac-
cessing instructions in
areas
set
aside
for other users.
Storage Management. Main memory
is
expandable
to
256K
(K
= 1024) words.
To
make
efficient
use of
available
mem-
ory,
the
memory map hardware permits storing a user's
pro-
gram in fragments as
sma
II
as a
page
of 512 words,
wherever
space
is avai lable;
yet
all
fragments
appear
as a
single,
contiguously addressable block of storage
at
execution
time.
The
memory map also
automatically
handles dynamic
pro-
gram
relocation
so
that
the
program appears to
be
stored in
n
dnnrlrlrt"l
v.i0}'
0t
~X~ClJt!0!",!
t!!'!'!e, e'!e!"!
th0~gh
it
!'!'!cy
cc-
tually
be stored in a
different
set of locations
each
time
it
is brought into memory. The memory map provides
the
abi I ity
to
locate
any
128K-word virtual program in
the
basic
processor's logical addressing
space.
Thus,
the
system
can
always address a virtual memory
of
128K
words regardless
of physical memory
size.
Input/Output
Capability.
Time-sharing
input/output
re-
quirements
are
handled by
the
same
general-purpose
input/
output
capabi
I i ti es descri bed under
II
Genera
I-Purpose
Features".
Nonstop
Operation.
A "watchdog" timer assures
that
the
system continues
to
operate
even
in
case
of
halts
or
delays
due
to
fai lure of special
I/O
devices.
Multiple
real-time
clocks
with varying resolutions permit
independent
time
bases for
flexible
allocation
of time
slices
to
each
user.
Reliability,
Maintainability,
Availability.
Since
time-
sharing systems have many
on-line
users needing immediate
system response,
"downtime"
defeats
time sharing's primary
purpose.
Pool i
ng
of resources a long
wi
th
fl
exi
bl
e
recon-
figuration control ensures a high level of continuous
avail-
ability.
Configuration controls
are
provided to switch the
load from one
unit
to
another
in the
event
of
a
failure
with
no loss of functional
capability,
only
capacity.
In
addi-
tion,
a nonworking subset of
the
total system may be
logically
isolated (partitioned)
so
that
maintenance
may
proceed on
the
subset while
the
remainder of
the
system
conti nues
to
operate.
To
minimize
the
effect
of
transient
errors,
automatic
retry
of fa i led instructions is performed.
REAL-TIME
FEATURES
Real-time
applications
are
characterized
by a need for:
(1)
hardware
that
provides
quick
response to
an
external
environment;
(2)
speed
that
is sufficient
to
keep
up
with
the
real-time
process itself;
(3)
input/output
flexibility
to
handle
a
wide
variety
of
data
types
at
different
speeds;
and
(4)
reliabi
lity features
to
minimize
irreplaceable
lost
time.
Multilevel,
Priority Interrupt System. The
real-time-
ori
ented
system provi des rapi d response to
external
interrupt
levels. Each interrupt is
automatically
identified
and
res-
ponded
to
according
to
its priority. For further flexibi
lity,
each
level
can
be
individually
disarmed (to discontinue
in-
put
acceptance)
and disabled (to
defer
responses).
Use
of
the
disarm/disable
feature
makes programmed dynamic
re-
assignment of priorities quick
and
easy,
even
while
a
real-
ti
me
process is in progress.
Programs involving interrupts from
specially
designed
equip-
ment often
require
checkout
before the equipment is
actually
avai
lable.
To
permit simulating this special equipment,
any
external
interrupt
level
can
be
"triggered"
by
the
basic
processor through
execution
of a single instruction. This
capability
is
also
useful in establishing a modified hierarchy
of responses. For
example,
in responding
to
a
high-priority
interrupt,
after
the
urgent processing is
completed,
it
may
be
desirable
to
assign a lower priority
to
the
remaining
por-
tion so
that
the
interrupt
routine is free
to
respond
to
other
critical
stimul
i.
The interrupt routine
can
accomplish this
by triggering a
lower-priority
level,
which processes
the
remaining
data
only
after
other interrupts
have
been handled.
READ
DIRECT
and
WRITE
DIRECT
instructions (described in
Chapter
3)
allow
the program to
completely
interrogate,
preserve, and a I
ter
the
conditi on of the
interrupt
system
at
any
time
and
to
restore
that
system
at
a
later
time.
Nonstop
Operation.
When
connected
to
special
devices
(on a
ready/resume
basis),
the
basic processor may
be
ex-
cessively
delayed
if
the
specific
device
does not respond
quickly.
As
in
the
time-sharing environment,
the
built-in
watchdog timer assures
that
the
basic processor
cannot
be
delayed
for
an
excessive length of time.
Real-Time Clocks. Many
real-time
functions must be timed
to
occur
at
specific
instants.
Other
timing information
isalso
needed
- for
example,
elapsed
time since a
given
event,
or
the
current
time of
day.
The computer system
can
contain
up
to
four
real-time
clocks
with varying
degrees
of
resolu-
ti on
to
meet these needs. These
clocks
a I
so
a
II
ow easy
hand-
ling of
separate
time bases and
relative
time priorities.
Real-Time Features 5
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